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Quadric

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uuid0000ew5

Namestring
Quadric
Legal namestring
Quadric, Inc.
Websiteurl
quadric.ai
Company typeenum
Private
Founded yearint
2016
Descriptiontext

Quadric is a privately held, venture-backed semiconductor intellectual property company founded in 2016 and headquartered in Burlingame, California. It designs and licenses the Chimera General Purpose Neural Processing Unit (GPNPU) — a hybrid Von Neumann + 2D SIMD processor IP that executes matrix, vector, and scalar operations in a single fully C++ programmable core, eliminating the graph partitioning required by heterogeneous NPU+DSP+CPU designs. The portfolio scales from the 1-7 TOPS QC-Nano through QC-Perform, QC-Ultra, and up to the QC-Multi cluster at 6,400 TOPS, with Safety Enhanced variants marketed as ASIL B/D Ready for automotive and support for transformers up to 30B parameters via cluster and UCIe chiplet configurations. The IP is synthesized into customer SoCs across 12nm to 3nm process nodes.

The company pairs the processor IP with the Chimera software stack — the Chimera Graph Compiler (ONNX ingest, multi-pass optimization, INT8 quantization), the Chimera LLVM C++ compiler, the ChiPy Python DSL, and a cycle-accurate Instruction Set Simulator — plus the cloud-based DevStudio environment that exposes a 350+ model benchmark zoo and a Model Context Protocol server for AI-agent access. Quadric's revenue comes from upfront and recurring IP licensing and development-license fees, supplemented by co-development engagements (e.g., DENSO, NSITEXE, MegaChips, ams OSRAM) and paid DevStudio services billed via Stripe.

Quadric sells primarily to semiconductor companies, ASIC design services firms, and Tier 1 automotive suppliers building AI-capable SoCs for edge LLMs, ADAS and autonomous driving, robotics, office automation, AI PCs, and sovereign AI programs. Named customers include DENSO, NSITEXE, Kyocera Document Solutions, MegaChips, TIER IV, and ams OSRAM. The company operates across North America (Burlingame HQ), Asia (Tokyo subsidiary Quadric KK, India R&D, plus offices in China, South Korea, and Taiwan) and Europe, with 51-100 employees and approximately $72M of total capital raised as of January 2026.

Short descriptiontext

Quadric develops licensable Chimera GPNPU processor IP and supporting compiler tools that enable fully programmable on-device AI inference for semiconductor designers targeting automotive, edge LLM, robotics, and enterprise vision markets.

Operating statusenum
Operating
Ownership categoryenum
Headcount rangeband
51–100
akta.pro rankint
HeadquartersBurlingame, United States
HQ citystring
Burlingame
HQ countrystring
United States
HQ regionstring
North America
Markets served

Serves global market

Offices6 records

Each record includes

City, Country, Type, Description, Source

Keyword5 values
neural processing unit, AI processor IP, semiconductor IP licensing, edge AI inference, on-device AI acceleration
Industry3 codes
1Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC)
CodeHDAHABACPrimaryYes
2Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security)
CodeHDAHAFAFPrimaryNo
3Edge AI Hardware & NPUs (SoCs, modules, accelerators)
CodeHDAAAJACPrimaryNo
NAICS code1 code
  • Semiconductor and Related Device Manufacturing334413
SIC code1 code
  • Semiconductors & Related Devices3674
Product category
AI Processor IP
Social media profiles1 record
GTM motion1 record

Each record includes

Type, Description, Source

Revenue model3 records
1Processor IP Licensing
TypeLicensing Royalties
Description

Primary revenue stream: licensing of Chimera GPNPU processor IP cores to semiconductor companies and systems companies designing AI-capable chips. Licensees span automotive, edge LLM, office automation, and autonomous driving markets. Customers reportedly go from engagement to production-ready AI silicon in under six months.

quadric.ai
2Development License & Co-Development Fees
TypeOne Time License
Description

Includes development license agreements with automotive partners such as DENSO for joint IP co-development targeting specific use cases like in-vehicle NPU. Includes evaluation/SDK licenses such as with TIER IV for Autoware development.

cryptorank.io
3DevStudio Cloud Platform Access
TypeSubscription Recurring
Description

Cloud-based collaborative development environment providing SDK, benchmarks, model zoo, and compilation tools. Per Terms of Use, certain features may be subject to Paid Services with recurring billing via Stripe payment processor.

quadric.ai
Marketing channels8 records

Each record includes

Title, Type, Stage, Description, Source

Distribution channels5 records

Each record includes

Title, Type, Scope, Target buyer, Description, Source

Cost components5 values
Technology or R&D, Personnel, Marketing or Sales, Operations, Infrastructure
Pricing details1 tier
1Quote-based IP licensing for Chimera GPNPU processor cores (QC-Nano, QC-Perform, QC-Ultra, QC-Multi) with optional SDK and DevStudio access
ModelOtherBilling cadenceMulti-year contract
Notes

Pricing not publicly listed; requires direct sales engagement ('Request Evaluation,' 'Talk to Our Team,' 'Contact Sales'). Terms of Use indicates Paid Services may include recurring billing via Stripe with auto-renewal.

quadric.ai
GTM typeB2B
B2B
Offering typeSoftware
Software
Brand1 of 3 records shown
1Chimera
Description

Chimera GPNPU — general-purpose neural processing unit semiconductor IP product family offered by Quadric.

quadric.ai
+2 more records
Core offering1 text field

Quadric licenses the Chimera General-Purpose Neural Processing Unit (GPNPU) processor IP family to semiconductor and systems companies designing AI-capable chips. The Chimera GPNPU is a fully programmable hybrid Von Neumann + 2D SIMD architecture delivering 1 to 6,400 TOPS, paired with the Chimera SDK (compiler, LLVM toolchain, instruction set simulator) and the cloud-based DevStudio environment. Together, these products let chip designers run modern AI workloads including transformers, ViTs, LLMs (up to 30B parameters), and vision models on a single unified processor core without graph partitioning between NPU, DSP, and CPU blocks.

Differentiator
Functional benefit
Problem solved
Product overview1 text field

Quadric offers a unified AI inference platform centered on the Chimera General-Purpose Neural Processing Unit (GPNPU) processor IP family — a single fully programmable hybrid Von Neumann + 2D SIMD architecture that scales from the 1–7 TOPS QC-Nano single core, through the 4–28 TOPS QC-Perform and 16–108 TOPS QC-Ultra single cores, up to the 32–6,400 TOPS QC-Multi multi-core/multi-instance cluster. The hardware IP is paired with the Chimera SDK — comprising the Chimera Graph Compiler (CGC), the Chimera LLVM C++ Compiler, the ChiPy Python DSL, and the cycle-accurate Instruction Set Simulator (ISS) — and with the cloud-based DevStudio environment, where customers compile ONNX models from PyTorch/TensorFlow, run pre-built model demos, profile thousands of parametric Chimera configurations, and access live MCP-exposed resources for connected AI agents. Together these products enable customers to go from engagement to production-ready LLM-capable silicon in under six months across automotive, edge-server LLM, robotics, consumer, and enterprise vision applications.

Product and service5 records
1Chimera GPNPU Processor IP Family
CategoryAI Processor IP
Description

Licensable General-Purpose Neural Processing Unit (GPNPU) semiconductor IP with a hybrid Von Neumann + 2D SIMD architecture, 7-stage in-order pipeline, and 64-bit instruction word. Sold as the QC-Nano (1-7 TOPS), QC-Perform (4-28 TOPS), QC-Ultra (16-108 TOPS), and QC-Multi (32-6,400 TOPS) variants synthesized for 12 nm to 3 nm process nodes, with optional ASIL B/D Ready safety-enhanced configurations. Target customers are semiconductor and SoC design companies building AI-capable chips for automotive, edge LLM, robotics, consumer, and enterprise vision.

2Chimera SDK
CategorySoftware Development Toolkit
Description

End-to-end software toolkit for compiling AI graphs and C++ code to the Chimera GPNPU. Includes the Chimera Graph Compiler (ONNX import, INT8 auto-quantization, multi-pass optimization, CCL output), the Chimera LLVM C++ Compiler with Quadric-specific back end, the cycle-accurate Instruction Set Simulator (ISS), and Docker-based deployment for on-premise/private-cloud compilation and profiling. For chip designers and ML engineers developing Chimera-based SoCs.

3DevStudio
CategoryCloud Development Platform
Description

Cloud-based collaborative development environment for compiling, simulating, profiling, and benchmarking AI models on Chimera GPNPU configurations. Hosts a 350+ curated model zoo, parametric configuration sweeps across QC-Nano/QC-Perform/QC-Ultra product families, cycle-accurate job logs, downloadable compiled artifacts, and serves as the data backend for Quadric's MCP server used by connected AI agents. Free registration required; certain features subject to Paid Services with recurring billing via Stripe.

4ChiPy Python DSL
CategoryDeveloper Framework
Description

Quadric's Python domain-specific language for building end-to-end on-chip AI pipelines that compile directly to native Chimera GPNPU binaries without host CPU intervention or DDR round-trips, leveraging the same C++ kernel extension path as the rest of the SDK. For ML engineers and embedded developers building on Chimera.

5DevStudio MCP Server
CategoryDeveloper Tooling
Description

Quadric's Model Context Protocol server that exposes DevStudio documentation search, model catalog search, and live resources to connected AI agents (e.g., Claude) so they can understand the Chimera GPNPU stack. For developers and partners integrating AI agents into the Chimera evaluation workflow.

Scale indicator16 records

Each record includes

Type, Value, Description, Source

Partnership4 partners
Strategic tierFlagship Automotive Customer And Co-Development PartnerTypeStrategic or Co-development PartnerAnnounced on2024-10-29
Description

Signed a development license agreement (October 2024) for an NPU, under which DENSO acquires the Chimera GPNPU IP core license and the two companies co-develop IP for an in-vehicle semiconductor targeting advanced driver assistance and intelligent vehicle applications. Builds on the earlier NSITEXE/Quadric joint development and represents DENSO's direct commitment to the GPNPU architecture for production ADAS chips.

Strategic tierEcosystem Partner For Startup Customer AcquisitionTypeGTM or Marketing PartnerAnnounced on2023-06-29
Description

Joined as a member of Silicon Catalyst's In-Kind Partner (IKP) ecosystem in June 2023, making Chimera GPNPU IP available to Silicon Catalyst's portfolio companies in the incubator. Provides technical and business support to early-stage semiconductor startups, accelerating Quadric's reach into emerging chip designers.

Strategic tierJoint Ecosystem Marketing Partner For Intelligent Image SensorsTypeTechnology or IntegrationAnnounced on2023-01-05
Description

Collaboration announced for CES 2023 (January 2023) demonstrating Chimera GPNPU processors alongside ams OSRAM Mira CMOS image sensors to deliver low-power, small-form-factor smart sensing demos for face detection, human pose, motion and occupancy detection. Showcases the integration of Quadric IP with industry-leading image sensor technology.

Strategic tierFlagship Distribution And Co-Development Partner In Japan/AsiaTypeStrategic or Co-development PartnerAnnounced on2022-03-16
Description

Strategic partnership (May 2022) with this leading Japan-based ASIC and SoC services company to deliver ASIC and SoC solutions built on Quadric's GPNPU architecture. Also participated as a major investor in the Series B funding round. Combines capital, co-development, and channel reach into the Japanese ASIC market.

Recent move8 records

Each record includes

Date, Type, Title, Description, Source

Expansion highlight6 records

Each record includes

Type, Description

Peers10 records
TypeBroad incumbent
Description

Arm's Ethos NPU IP family (Ethos-U55, U65, N78) is the most widely deployed licensable NPU IP in the world, integrated across billions of edge devices. As the dominant processor IP incumbent with established customer relationships at every major SoC designer, Arm is the most direct competitive threat to Quadric's Chimera GPNPU in edge AI inference, though Arm's NPU IP tends to be more fixed-function and less programmable than Chimera's single-core C++ approach.

TypeBroad incumbent
Description

Synopsys' ARC NPX and EV7x processor IP families target the same licensable AI/ML inference IP market as Quadric, with the IP group scaled to $1.9B in annual revenue under former EVP/GM Joachim Kunkel (now on Quadric's board). Synopsys bundles NPU IP with its dominant EDA toolchain, creating both a formidable competitor and a potential long-term partnership vector; its ARC NeuroProcessor and DesignWare EV cores overlap directly with Chimera's programmable inference positioning.

TypeBroad incumbent
Description

Cadence's NeuroWeave and Tensilica AI IP families offer licensable neural network and DSP processors to SoC designers, bundled with Cadence's EDA flow and digital implementation tools. Cadence competes with Quadric for the same automotive, vision, and edge AI IP sockets, and previously employed Quadric's VP Engineering (Dhanendra Jani) — making it both a direct competitor and a recruiting source for Quadric's leadership bench.

TypeDirect peer
Description

Ceva's NeuPro family of NPU IP and NeuPro-M/Nano edge AI cores target the same licensable on-device AI inference market as Quadric, with comparable performance-per-watt claims and design wins in consumer, IoT, and automotive. Ceva's installed base in DSP-based SoCs gives it strong incumbency with voice, audio, and vision customers that overlap with Quadric's edge AI pipeline, making it one of the closest direct comparables in business model and target market.

TypeDirect peer
Description

VeriSilicon's VIP Series (VIPNano, VIP7000, VIP9000) NPU IP cores offer licensable AI inference processors for edge and embedded applications, serving similar automotive, IoT, and consumer SoC customers. As a China-headquartered IP vendor with strong presence in the Chinese SoC ecosystem, VeriSilicon competes with Quadric in some of the same design wins — particularly in image processing, vision, and consumer AI applications — while also serving as a regional alternative.

TypeDirect peer
Description

Imagination's PowerVR GPU and NNA (Neural Network Accelerator) IP families target licensable edge AI inference with comparable TOPS-per-watt positioning to Chimera. With a heritage in GPU IP and a renewed push into automotive and consumer AI inference, Imagination competes with Quadric for the same SoC design wins, particularly in vision-based automotive and consumer applications where both vendors are well-positioned.

TypeEmerging player
Description

Lightmatter builds photonic AI compute hardware and interconnects targeting data center and edge inference workloads, and is expanding into licensable photonic IP for AI accelerators. While Lightmatter's primary product is silicon photonics-based hardware rather than a programmable NPU core IP, it competes for the same SoC designer mindshare and capital on the 'next generation of AI compute' narrative that Quadric is building its GPNPU positioning around.

TypeEmerging player
Description

Tenstorrent develops RISC-V-based AI accelerator IP and licensable processor IP targeting edge and data center inference, with a comparable focus on programmable AI architectures and an emphasis on supporting modern transformer models natively. While Tenstorrent is more vertically integrated (selling its own AI accelerator cards in addition to IP), its RISC-V-based Wormhole/Blackhole IP overlaps with Quadric's positioning for customers seeking an open, programmable AI compute foundation.

TypeEmerging player
Description

Esperanto Technologies develops RISC-V-based AI accelerator IP and inference SoCs targeting data center and edge applications, with an architecture emphasizing energy-efficient, programmable AI compute. As a venture-backed NPU IP startup with comparable scale to Quadric (private, post-Series stages), Esperanto serves as a useful reference point for valuation, headcount, and design-win benchmarks in the emerging RISC-V NPU IP category.

TypeOthers
Description

Companies like Blaize and Syntiant operate in the adjacent edge AI chip space, often building their own NPU architectures for low-power inference SoCs rather than licensing IP. They are ecosystem participants alongside Quadric in the Edge AI and Vision Alliance and compete for some of the same end-customer design wins (e.g., always-on vision, audio, IoT), but their business model (selling chips vs. licensing IP) is fundamentally different from Quadric's licensable GPNPU approach.

Market position
Strengths5 records

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Headline, Details, Source

Weaknesses5 records

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Competitive moat6 records

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Type, Details

Key risks5 records

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Key highlights7 records

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Headline, Details, Source

Customer concentration

Classification, Details

Named customers6 records

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Name, Industry, Type, Use case, Source, UUID

Segment7 records

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Title, Type, Primary, Description, Pain point addressed, Use case, Source

Ideal customer profile4 records

Each record includes

Profile, Firmographic size, Sales motion, Sales cycle length, Buying structure, Purchase trigger, Buyer persona, Geography, Industry vertical, Primary use case, Description, Pain points, Evidence proof points, Target buyer

Technology focused
Yes
API detail
Has APIbool
Yes

Docs URL, Description

AI capability14 records

Each record includes

Type, Description, Source

AI maturity
App detail

Has app

Feature11 records

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Title, Differentiator, Description, Source

Core technology
Revenue estimate
Valuation estimate
Number of profiles
Profiles9 records

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Subsidiaries1 record

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Name, Acquired on, Relationship type, Type, Business focus

Compliance4 records

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Name, Class, Description

Funding overview

Funding stage, Last funding date, Total funding USD

Funding rounds7 records

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Round, Amount USD, Date, Pre money valuation, Total investors, Investors, News

Investors22 records

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Name, Type, Date of entry, Rounds participated, Website

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Each record includes

Name, Acquisition type, Announced date, Completed date, Status, Website, News

Investment

Each record includes

Name, Round, Announced date, Lead investor, Website, News

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Quadric

AI Processor IPquadric.ai

Quadric develops licensable Chimera GPNPU processor IP and supporting compiler tools that enable fully programmable on-device AI inference for semiconductor designers targeting automotive, edge LLM, robotics, and enterprise vision markets.

What Quadric does

Quadric is a privately held, venture-backed semiconductor intellectual property company founded in 2016 and headquartered in Burlingame, California. It designs and licenses the Chimera General Purpose Neural Processing Unit (GPNPU) — a hybrid Von Neumann + 2D SIMD processor IP that executes matrix, vector, and scalar operations in a single fully C++ programmable core, eliminating the graph partitioning required by heterogeneous NPU+DSP+CPU designs. The portfolio scales from the 1-7 TOPS QC-Nano through QC-Perform, QC-Ultra, and up to the QC-Multi cluster at 6,400 TOPS, with Safety Enhanced variants marketed as ASIL B/D Ready for automotive and support for transformers up to 30B parameters via cluster and UCIe chiplet configurations. The IP is synthesized into customer SoCs across 12nm to 3nm process nodes.

The company pairs the processor IP with the Chimera software stack — the Chimera Graph Compiler (ONNX ingest, multi-pass optimization, INT8 quantization), the Chimera LLVM C++ compiler, the ChiPy Python DSL, and a cycle-accurate Instruction Set Simulator — plus the cloud-based DevStudio environment that exposes a 350+ model benchmark zoo and a Model Context Protocol server for AI-agent access. Quadric's revenue comes from upfront and recurring IP licensing and development-license fees, supplemented by co-development engagements (e.g., DENSO, NSITEXE, MegaChips, ams OSRAM) and paid DevStudio services billed via Stripe.

Quadric sells primarily to semiconductor companies, ASIC design services firms, and Tier 1 automotive suppliers building AI-capable SoCs for edge LLMs, ADAS and autonomous driving, robotics, office automation, AI PCs, and sovereign AI programs. Named customers include DENSO, NSITEXE, Kyocera Document Solutions, MegaChips, TIER IV, and ams OSRAM. The company operates across North America (Burlingame HQ), Asia (Tokyo subsidiary Quadric KK, India R&D, plus offices in China, South Korea, and Taiwan) and Europe, with 51-100 employees and approximately $72M of total capital raised as of January 2026.

Quadric firmographics

Firmographics
Name
Quadric
Legal name
Quadric, Inc.
Website
https://quadric.ai
Company type
Private
Founded year
2016
Operating status
Operating
Headcount range
51–100 employees
Short description
Quadric develops licensable Chimera GPNPU processor IP and supporting compiler tools that enable fully programmable on-device AI inference for semiconductor designers targeting automotive, edge LLM, robotics, and enterprise vision markets.
Ownership category
akta.pro rank

Quadric industry classification

Industry
Product category
AI Processor IP
NAICS
Semiconductor and Related Device Manufacturing (334413)
SIC
Semiconductors & Related Devices (3674)
akta.pro primary industry
Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC) (HDAHABAC)
akta.pro secondary industries
Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security) (HDAHAFAF), Edge AI Hardware & NPUs (SoCs, modules, accelerators) (HDAAAJAC)

Keywords

  • Neural processing unit
  • AI processor IP
  • Semiconductor IP licensing
  • Edge AI inference
  • On-device AI acceleration

Where Quadric is headquartered

Location

Headquarters

HQ city
Burlingame
HQ country
United States
HQ region
North America

Offices6 records

Markets served

Quadric business model

Business model
GTM type
B2B
Offering type
Software
Cost components
Technology or R&D, Personnel, Marketing or Sales, Operations, Infrastructure

Revenue model

  1. Processor IP Licensing: Primary revenue stream: licensing of Chimera GPNPU processor IP cores to semiconductor companies and systems companies designing AI-capable chips. Licensees span automotive, edge LLM, office automation, and autonomous driving markets. Customers reportedly go from engagement to production-ready AI silicon in under six months.
  2. Development License & Co-Development Fees: Includes development license agreements with automotive partners such as DENSO for joint IP co-development targeting specific use cases like in-vehicle NPU. Includes evaluation/SDK licenses such as with TIER IV for Autoware development.
  3. DevStudio Cloud Platform Access: Cloud-based collaborative development environment providing SDK, benchmarks, model zoo, and compilation tools. Per Terms of Use, certain features may be subject to Paid Services with recurring billing via Stripe payment processor.

Pricing tiers

ModelBillingPrice
OtherMulti-year contractQuote-based IP licensing for Chimera GPNPU processor cores (QC-Nano, QC-Perform, QC-Ultra, QC-Multi) with optional SDK and DevStudio access

Go-to-market motion1 record

Distribution channels5 records

Marketing channels8 records

Quadric product offering

Product offering

Core offering

Quadric licenses the Chimera General-Purpose Neural Processing Unit (GPNPU) processor IP family to semiconductor and systems companies designing AI-capable chips. The Chimera GPNPU is a fully programmable hybrid Von Neumann + 2D SIMD architecture delivering 1 to 6,400 TOPS, paired with the Chimera SDK (compiler, LLVM toolchain, instruction set simulator) and the cloud-based DevStudio environment. Together, these products let chip designers run modern AI workloads including transformers, ViTs, LLMs (up to 30B parameters), and vision models on a single unified processor core without graph partitioning between NPU, DSP, and CPU blocks.

Product overview

Quadric offers a unified AI inference platform centered on the Chimera General-Purpose Neural Processing Unit (GPNPU) processor IP family — a single fully programmable hybrid Von Neumann + 2D SIMD architecture that scales from the 1–7 TOPS QC-Nano single core, through the 4–28 TOPS QC-Perform and 16–108 TOPS QC-Ultra single cores, up to the 32–6,400 TOPS QC-Multi multi-core/multi-instance cluster. The hardware IP is paired with the Chimera SDK — comprising the Chimera Graph Compiler (CGC), the Chimera LLVM C++ Compiler, the ChiPy Python DSL, and the cycle-accurate Instruction Set Simulator (ISS) — and with the cloud-based DevStudio environment, where customers compile ONNX models from PyTorch/TensorFlow, run pre-built model demos, profile thousands of parametric Chimera configurations, and access live MCP-exposed resources for connected AI agents. Together these products enable customers to go from engagement to production-ready LLM-capable silicon in under six months across automotive, edge-server LLM, robotics, consumer, and enterprise vision applications.

Differentiator

Problem solved

Functional benefit

Brands

  • Chimera: Chimera GPNPU — general-purpose neural processing unit semiconductor IP product family offered by Quadric.
  • DevStudio
  • Chimera SDK

Products and services

  • Chimera GPNPU Processor IP Family Licensable General-Purpose Neural Processing Unit (GPNPU) semiconductor IP with a hybrid Von Neumann + 2D SIMD architecture, 7-stage in-order pipeline, and 64-bit instruction word. Sold as the QC-Nano (1-7 TOPS), QC-Perform (4-28 TOPS), QC-Ultra (16-108 TOPS), and QC-Multi (32-6,400 TOPS) variants synthesized for 12 nm to 3 nm process nodes, with optional ASIL B/D Ready safety-enhanced configurations. Target customers are semiconductor and SoC design companies building AI-capable chips for automotive, edge LLM, robotics, consumer, and enterprise vision.
  • Chimera SDK End-to-end software toolkit for compiling AI graphs and C++ code to the Chimera GPNPU. Includes the Chimera Graph Compiler (ONNX import, INT8 auto-quantization, multi-pass optimization, CCL output), the Chimera LLVM C++ Compiler with Quadric-specific back end, the cycle-accurate Instruction Set Simulator (ISS), and Docker-based deployment for on-premise/private-cloud compilation and profiling. For chip designers and ML engineers developing Chimera-based SoCs.
  • DevStudio Cloud-based collaborative development environment for compiling, simulating, profiling, and benchmarking AI models on Chimera GPNPU configurations. Hosts a 350+ curated model zoo, parametric configuration sweeps across QC-Nano/QC-Perform/QC-Ultra product families, cycle-accurate job logs, downloadable compiled artifacts, and serves as the data backend for Quadric's MCP server used by connected AI agents. Free registration required; certain features subject to Paid Services with recurring billing via Stripe.
  • ChiPy Python DSL Quadric's Python domain-specific language for building end-to-end on-chip AI pipelines that compile directly to native Chimera GPNPU binaries without host CPU intervention or DDR round-trips, leveraging the same C++ kernel extension path as the rest of the SDK. For ML engineers and embedded developers building on Chimera.
  • DevStudio MCP Server Quadric's Model Context Protocol server that exposes DevStudio documentation search, model catalog search, and live resources to connected AI agents (e.g., Claude) so they can understand the Chimera GPNPU stack. For developers and partners integrating AI agents into the Chimera evaluation workflow.

Companies that use Quadric

Customer profile

Named customers6 records

Segments7 records

Ideal customer profiles4 records

Quadric technology and API

Technology

Technology focussed Yes

API detail

Has API
Yes
API docs
API detail

Core technology

AI maturity

App detail

AI capability14 records

Feature11 records

Quadric partnerships and signals

Strategic signal

Partnerships

Four partnerships are on record, tiered flagship automotive customer and co-development partner, ecosystem partner for startup customer acquisition, joint ecosystem marketing partner for intelligent image sensors and flagship distribution and co-development partner in japan/asia.

  • DENSO Corporationflagship automotive customer and co-development partnerStrategic or Co-development Partner · 29 October 2024Signed a development license agreement (October 2024) for an NPU, under which DENSO acquires the Chimera GPNPU IP core license and the two companies co-develop IP for an in-vehicle semiconductor targeting advanced driver assistance and intelligent vehicle applications. Builds on the earlier NSITEXE/Quadric joint development and represents DENSO's direct commitment to the GPNPU architecture for production ADAS chips.
  • Silicon Catalystecosystem partner for startup customer acquisitionGTM or Marketing Partner · 29 June 2023Joined as a member of Silicon Catalyst's In-Kind Partner (IKP) ecosystem in June 2023, making Chimera GPNPU IP available to Silicon Catalyst's portfolio companies in the incubator. Provides technical and business support to early-stage semiconductor startups, accelerating Quadric's reach into emerging chip designers.
  • ams OSRAMjoint ecosystem marketing partner for intelligent image sensorsTechnology or Integration · 5 January 2023Collaboration announced for CES 2023 (January 2023) demonstrating Chimera GPNPU processors alongside ams OSRAM Mira CMOS image sensors to deliver low-power, small-form-factor smart sensing demos for face detection, human pose, motion and occupancy detection. Showcases the integration of Quadric IP with industry-leading image sensor technology.
  • MegaChipsflagship distribution and co-development partner in japan/asiaStrategic or Co-development Partner · 16 March 2022Strategic partnership (May 2022) with this leading Japan-based ASIC and SoC services company to deliver ASIC and SoC solutions built on Quadric's GPNPU architecture. Also participated as a major investor in the Series B funding round. Combines capital, co-development, and channel reach into the Japanese ASIC market.

Scale indicators16 records

Recent moves8 records

Expansion highlights6 records

Quadric competitors and assessment

Company assessment

Broad incumbents

  • Arm: Arm's Ethos NPU IP family (Ethos-U55, U65, N78) is the most widely deployed licensable NPU IP in the world, integrated across billions of edge devices. As the dominant processor IP incumbent with established customer relationships at every major SoC designer, Arm is the most direct competitive threat to Quadric's Chimera GPNPU in edge AI inference, though Arm's NPU IP tends to be more fixed-function and less programmable than Chimera's single-core C++ approach.
  • Synopsys: Synopsys' ARC NPX and EV7x processor IP families target the same licensable AI/ML inference IP market as Quadric, with the IP group scaled to $1.9B in annual revenue under former EVP/GM Joachim Kunkel (now on Quadric's board). Synopsys bundles NPU IP with its dominant EDA toolchain, creating both a formidable competitor and a potential long-term partnership vector; its ARC NeuroProcessor and DesignWare EV cores overlap directly with Chimera's programmable inference positioning.
  • Cadence Design Systems: Cadence's NeuroWeave and Tensilica AI IP families offer licensable neural network and DSP processors to SoC designers, bundled with Cadence's EDA flow and digital implementation tools. Cadence competes with Quadric for the same automotive, vision, and edge AI IP sockets, and previously employed Quadric's VP Engineering (Dhanendra Jani) — making it both a direct competitor and a recruiting source for Quadric's leadership bench.

Direct peers

  • Ceva: Ceva's NeuPro family of NPU IP and NeuPro-M/Nano edge AI cores target the same licensable on-device AI inference market as Quadric, with comparable performance-per-watt claims and design wins in consumer, IoT, and automotive. Ceva's installed base in DSP-based SoCs gives it strong incumbency with voice, audio, and vision customers that overlap with Quadric's edge AI pipeline, making it one of the closest direct comparables in business model and target market.
  • VeriSilicon: VeriSilicon's VIP Series (VIPNano, VIP7000, VIP9000) NPU IP cores offer licensable AI inference processors for edge and embedded applications, serving similar automotive, IoT, and consumer SoC customers. As a China-headquartered IP vendor with strong presence in the Chinese SoC ecosystem, VeriSilicon competes with Quadric in some of the same design wins — particularly in image processing, vision, and consumer AI applications — while also serving as a regional alternative.
  • Imagination Technologies: Imagination's PowerVR GPU and NNA (Neural Network Accelerator) IP families target licensable edge AI inference with comparable TOPS-per-watt positioning to Chimera. With a heritage in GPU IP and a renewed push into automotive and consumer AI inference, Imagination competes with Quadric for the same SoC design wins, particularly in vision-based automotive and consumer applications where both vendors are well-positioned.

Emerging players

  • Lightmatter: Lightmatter builds photonic AI compute hardware and interconnects targeting data center and edge inference workloads, and is expanding into licensable photonic IP for AI accelerators. While Lightmatter's primary product is silicon photonics-based hardware rather than a programmable NPU core IP, it competes for the same SoC designer mindshare and capital on the 'next generation of AI compute' narrative that Quadric is building its GPNPU positioning around.
  • Tenstorrent: Tenstorrent develops RISC-V-based AI accelerator IP and licensable processor IP targeting edge and data center inference, with a comparable focus on programmable AI architectures and an emphasis on supporting modern transformer models natively. While Tenstorrent is more vertically integrated (selling its own AI accelerator cards in addition to IP), its RISC-V-based Wormhole/Blackhole IP overlaps with Quadric's positioning for customers seeking an open, programmable AI compute foundation.
  • Esperanto Technologies: Esperanto Technologies develops RISC-V-based AI accelerator IP and inference SoCs targeting data center and edge applications, with an architecture emphasizing energy-efficient, programmable AI compute. As a venture-backed NPU IP startup with comparable scale to Quadric (private, post-Series stages), Esperanto serves as a useful reference point for valuation, headcount, and design-win benchmarks in the emerging RISC-V NPU IP category.

Others

  • Edge AI and Vision Alliance member ecosystem (e.g., Blaize, Syntiant): Companies like Blaize and Syntiant operate in the adjacent edge AI chip space, often building their own NPU architectures for low-power inference SoCs rather than licensing IP. They are ecosystem participants alongside Quadric in the Edge AI and Vision Alliance and compete for some of the same end-customer design wins (e.g., always-on vision, audio, IoT), but their business model (selling chips vs. licensing IP) is fundamentally different from Quadric's licensable GPNPU approach.

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Frequently asked questions about Quadric

What does Quadric do?

Quadric licenses the Chimera General-Purpose Neural Processing Unit (GPNPU) processor IP family to semiconductor and systems companies designing AI-capable chips. The Chimera GPNPU is a fully programmable hybrid Von Neumann + 2D SIMD architecture delivering 1 to 6,400 TOPS, paired with the Chimera SDK (compiler, LLVM toolchain, instruction set simulator) and the cloud-based DevStudio environment. Together, these products let chip designers run modern AI workloads including transformers, ViTs, LLMs (up to 30B parameters), and vision models on a single unified processor core without graph partitioning between NPU, DSP, and CPU blocks.

Is Quadric a public or private company?

Quadric is a private company. It is classified as venture growth investor backed and is currently operating.

When was Quadric founded?

Quadric was founded in 2016. It employs 51 to 100 people.

Where is Quadric based?

Quadric is headquartered in Burlingame, United States, in the North America region.

How does Quadric make money?

Three revenue lines are on record. Processor IP Licensing is the primary driver. The others are development License & Co-Development Fees and devStudio Cloud Platform Access.

Who are Quadric's main competitors?

Broad incumbents on record are Arm, Synopsys and Cadence Design Systems. Direct peers are Ceva, VeriSilicon and Imagination Technologies. Emerging players are Lightmatter, Tenstorrent and Esperanto Technologies. Edge AI and Vision Alliance member ecosystem (e.g., Blaize, Syntiant) is listed as an others.

Does Quadric have an API?

Yes. Quadric offers the DevStudio cloud-based development environment at https://app.quadric.ai/ for compiling, simulating, profiling, and benchmarking AI models on Chimera GPNPU configurations, alongside the downloadable Chimera SDK (with the Chimera Graph Compiler, Chimera LLVM C++ Compiler, and ChiPy Python DSL supporting C++ and Python). Quadric also operates its own MCP (Model Context Protocol) server that exposes DevStudio documentation search, model catalog search, and live resources to connected AI agents. The SDK is delivered as a Docker image for on-premise/private-cloud deployment, and access to DevStudio requires a free registered account. Developer documentation is at app.quadric.ai.

What industry is Quadric in?

Quadric's product category is AI Processor IP. Its primary akta.pro industry code is HDAHABAC, Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC), with a secondary code of HDAHAFAF, Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security). Its NAICS code is 334413 and its SIC code is 3674.

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Semiconductor EngineeringGenerative AI On A General-Purpose Neural Processor (GPNPU)Quadric presents the General-Purpose Neural Processor (GPNPU), a configurable IP architecture that unifies scalar, vector, and matrix execution in one ISA and C++/Python programming model. The design addresses generative-AI workloads evolving quarterly, with a block diagram showing a scalar unit and 2D SIMD PE array.Semiconductor EngineeringOne Processor, One ToolchainQuadric's Chimera GPNPU is a single, software-controlled core that handles matrix, vector, and scalar code in one execution pipeline, replacing the conventional three-core AI SoC stack. This unified architecture eliminates toolchain fragmentation, cross-core synchronization, and silent operator fallbacks, offering one toolchain and one debugger. The design aims to simplify embedded AI software development by removing integration complexity.Semiconductor EngineeringIs Pergrammable A Word?Quadric is promoting its Chimera GPNPU processor, which it claims is 'pergrammable' by combining high computational efficiency with full software programmability in a single unified architecture. This approach aims to solve the industry challenge of maintaining performance on new AI models without requiring hardware respins or suffering from the limitations of traditional hybrid accelerator-core designs.citybizQuadric Closes $46M Series C to Expand Edge AI Chip DeploymentsQuadric has closed a second tranche of its Series C financing, bringing the total raise to $46 million from the International Finance Corp (IFC) and increasing its total capital raised to $90 million. The company plans to use the funds to expand sales and engineering efforts for its programmable AI processor platform, targeting emerging sectors such as humanoid robotics and wearables. This investment highlights a broader industry shift toward edge AI inference to reduce reliance on cloud infrastructure.FinSMEsQuadric Extends Series C to $46MQuadric extended its Series C to $46M, led by the International Finance Corporation, with participation from prior investors. The round brings total funding to $90M. Funds will expand support and go-to-market teams for automotive, AI PCs, enterprise, and incoming customers in humanoid robotics, wearables, and networking.Pulse 2.0Quadric Raises $46 Million Series C To Advance Programmable AI Chip PlatformQuadric announced the second close of its Series C financing, bringing the round to $46 million and total capital raised to $90 million, with the International Finance Corporation (IFC) leading this tranche in its first AI chip investment. The funding follows a year in which the company's product revenue more than tripled and it reached profitability, with new capital set to expand customer support and go-to-market teams. The company is developing a programmable AI chip platform targeting edge devices across automotive, AI PCs, enterprise, humanoid robotics, wearables, and networking markets.AijournQuadric Extends Series C to $46M with Second Close led by World Bank’s IFCQuadric, a Burlingame-based AI chip company, announced the second close of its Series C funding at $46 million, led by the International Finance Corporation (IFC), bringing total capital raised to $90 million. Existing investors Pear VC, Uncork Capital, and BEENEXT increased their stakes, while Offline Ventures joined as a new investor; the capital will expand go-to-market teams for customers in automotive, AI PCs, enterprise, humanoid robotics, wearables, and networking. The IFC's investment marks its first in an AI chip company, targeting markets that hyperscaler-dependent solutions cannot serve.Third NewsQuadric Successfully Secures $46M in Series C Funding Led by IFC to Propel AI InnovationsQuadric, Inc. has successfully extended its Series C funding round to $46 million, led by the International Finance Corporation (IFC), with total funding now exceeding $90 million. The investment will support team expansion and customer growth across automotive technology, AI personal computers, enterprise solutions, and emerging sectors including humanoid robotics, wearable devices, and networking technologies. The IFC's involvement reflects its strategy to make powerful AI more accessible to small and medium enterprises in emerging markets, with the corporation having invested over $3 billion in tech ventures within those regions.PR NewswireQuadric Extends Series C to $46M with Second Close led by World Bank's IFCQuadric has closed the second tranche of its Series C funding at $46 million, with the International Finance Corporation (IFC) leading the round in its first-ever AI chip investment. The World Bank's private sector arm cited Quadric's ability to serve markets that hyperscaler-dependent solutions cannot reach as the key rationale for backing the company. Prior investors Pear VC, Uncork Capital, and BEENEXT increased their stakes as Quadric's design-win footprint expands across humanoid robotics, wearables, and networking applications.QuadricQuadric Extends Series C to $46M with Second Close led by World Bank's IFCQuadric closed its second Series C round for $46 million, led by the IFC, bringing total capital to $90 million. The funds will expand support and go-to-market teams for existing and new customers in automotive, AI PCs, and enterprise. The company's programmable AI chip platform runs any AI model directly on the device.