Name

Niuxin Semiconductor

Legal name

牛芯半导体（深圳）股份有限公司

Website

https://kniulink.com

Company type

Private

Founded year

2020

Operating status

Operating

Headcount range

11–50 employees

Ownership category

akta.pro rank

Product category

Semiconductor Interface IP

NAICS

Semiconductor and Other Electronic Component Manufacturing (33441), Semiconductor and Other Electronic Component Manufacturing (3344)

SIC

Semiconductors & Related Devices (3674)

akta.pro primary industry

AI Hardware IP & Chiplet/Packaging for Accelerators (EDA/IP, advanced packaging) (HDAAAAAL)

akta.pro secondary industries

Networking & Data Center Silicon (Switch/NIC/DPU/SerDes) (HDAHABAB), Storage & Interface Controllers (SSD/NVMe/UFS/USB/PCIe) (HDAHABAG)

Keywords

• Semiconductor interface IP
• High-speed SerDes IP
• DDR memory IP cores
• JESD204B/C IP
• Chiplet D2D interconnect

Headquarters

HQ city

Shenzhen

HQ country

China

HQ region

Asia

Offices4 records

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Marketing or Sales, Infrastructure

Revenue model

1. IP Licensing / Authorization: Licensing of proprietary interface IP cores (SerDes, DDR, JESD204, etc.) to chip design companies for integration into their SoC products. Revenue recognized per IP core licensed, typically per project or per chip volume. Covers multiple process nodes and protocol combinations.
2. Chip Customization / Turnkey Services: Custom chip design and development services including front-end design, back-end implementation, tape-out, packaging, testing, and mass production support. Based on proprietary IP capabilities, serving customers requiring full-stack chip solutions or highly differentiated custom ICs.
3. UB Protocol / Advanced IP Solutions: Next-generation protocol IP licensing (UB/灵衢) targeting AI compute cluster interconnects, serving customers building hyperscale compute infrastructure and advanced AI accelerator chips.

Pricing tiers

Go-to-market motion3 records

Distribution channels1 record

Marketing channels5 records

Core offering

Niuxin Semiconductor designs, develops, and licenses proprietary high-speed interface semiconductor IP cores — primarily SerDes (Serializer/Deserializer) IP and DDR memory IP — along with Chiplet/D2D interconnect and UB protocol IP, to fabless chip design companies across China. Its portfolio covers process nodes from 180nm to 7nm and automotive-grade processes, deployed across AI, intelligent driving, 5G, data center, FPGA, and high-speed data conversion applications. The company complements IP licensing with turnkey chip customization services spanning front-end design through wafer fabrication, packaging, testing, and mass production.

Product overview

Niuxin Semiconductor (牛芯半导体) offers a comprehensive portfolio of high-speed interface IP products and solutions. The core product lines include SerDes IP (encompassing Combo SerDes, PCIe, Rapid IO, SATA/SAS, JESD204B/204C, USB3.1, LVDS, MIPI, 64G/112G SerDes) and DDR IP (spanning DDR3/4/5 and LPDDR2/3/4/4x/5), supported by Turnkey Solution services for custom chip development. The company provides both PHY and MAC IP solutions, enabling customers to access high-performance memory interface and high-speed serial interconnect solutions for applications in AI servers, intelligent driving, edge computing, 5G communications, and data centers.

Differentiator

Problem solved

Functional benefit

Brands

• DDR5 MC + PHY IP: High-performance DDR5 memory interface IP solution achieving up to 8400Mbps data rates, with controller and PHY full solutions.
• Combo SerDes

Products and services

• SerDes IP High-speed transceiver IP cores designed with advanced architecture for low-power and high-performance applications; highly configurable to integrate with user logic or SoC. Covers protocols including PCIe, JESD204B/C, USB3.1, SATA/SAS, RapidIO, LVDS, MIPI, and Ethernet at data rates from 1.25Gbps to 112Gbps. Targeted at fabless chip design companies building AI, networking, automotive, 5G, and data center chips.
• DDR IP Advanced-architecture DDR memory interface IP providing high performance and low power, supporting DDR3, DDR4, DDR5, and LPDDR2, LPDDR3, LPDDR4, LPDDR4x, and LPDDR5 protocols. Includes full PHY+MAC solutions with DFI interface, 2D VREF training, temperature-compensated delay line, DVFS, and deep sleep modes. DDR5 achieves up to 8400Mbps and LPDDR5 achieves up to 6400Mbps. Targeted at AI servers, intelligent driving domain controllers, edge computing, and high-performance consumer electronics.
• Turnkey Solution (Chip Customization Services) End-to-end custom chip development services covering front-end design and verification, back-end physical implementation, wafer fabrication, packaging, testing, and mass production support. Based on Niuxin's proprietary IP, the service targets customers requiring full-stack chip solutions or highly differentiated custom ICs across AI, networking, and high-speed data conversion applications.
• Combo SerDes IP Multi-mode transceiver IP core supporting multiple protocols including CEI-25G/28G, PCIe 4.0, JESD204C, USB3.1, 10G-KR, SATA3, and DP1.4 at data rates of 10.3125/16/25/28/32Gbps. Designed for SoC designers needing flexible, multi-protocol high-speed serial interface support.
• PCIe 6.0/5.0/4.0/3.0/2.0 IP PCI Express IP core supporting Gen1 through Gen6 with data rates from 2.5Gbps to 64Gbps. PAM4 support for 32-64Gbps rates and NRZ support for 2.5-32Gbps. Targeted at chip designers building PCIe-compliant interfaces for AI accelerators, data center chips, and networking SoCs.
• JESD204B/204C IP JESD204B/204C interface IP with both PHY and MAC layer implementations, supporting X1/X4/X8/X16 configurations, deterministic latency, subclass 0/1/2, 8b/10b and 64b/66b encoding, optional FEC, and DDC/DUC digital processing modules. Fully compatible with high-end international ADC/DAC chips. Targeted at high-speed data converter designers in wireless base stations, radar, medical imaging, and instrumentation.
• 112G SerDes IP 112Gbps SerDes IP with PMA and PCS layer supporting data rates from 1.25Gbps to 112Gbps, with PAM4 support for 56-112Gbps rates. Designed for 800G/1.6T communication and next-generation AI compute applications.
• DDR5 IP DDR5 memory interface IP solution delivering high performance and low power, compatible up to 8400Mbps, with DFI 5.0/4.0 compliant interface. Verified on domestic advanced process nodes and targeted at AI servers, intelligent driving domain controllers, edge computing, and high-end consumer electronics.
• LPDDR5 IP LPDDR5 memory interface IP solution with channel equalization, link ECC, and DVFS support, achieving up to 6400Mbps. Targets low-power mobile and edge AI applications requiring high-bandwidth LPDDR memory access.
• Chiplet / Die-to-Die (D2D) Interconnect IP Die-to-Die interconnect IP supporting UCIe-standard compatible packaging (both advanced and standard), with multi-node heterogeneous integration, combined SerDes+DDR optimization for latency/bandwidth/power, and PHY+MAC+Package+Testability full chain support. Enables chiplet-based chip design with industry-standard interconnect.
• UB (UnifiedBus/灵衢) Protocol IP UB (UnifiedBus/灵衢) protocol IP covering the full protocol stack from physical layer through transaction layer. Supports synchronous memory access, credit-based flow control, multi-virtual-channel management, dynamic bandwidth switching, and CRC protection. Targets AI compute cluster interconnects and hyperscale compute infrastructure. Signed strategic cooperation with Huawei as one of the first six UB ecosystem partners (2026).

Quantifiable outcome

• DDR5/LPDDR5 IP achieves 6400Mbps on domestic advanced process node, with 10-20% higher mass production yield than newer advanced nodes
• +3 more outcomes

Named customers4 records

Segments5 records

Ideal customer profiles4 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature6 records

Partnerships

Eight partnerships are on record, tiered core and major.

• Huawei (华为)coreStrategic or Co-development Partner · 23 May 2026NIUXIN signed a strategic MOU with Huawei as one of the first six UB (UnifiedBus/灵衢) ecosystem partners at the Kunpeng Ascend Developer Conference 2026. NIUXIN's UB IP products have completed interoperability testing with standard UB network testers at the physical and data link layers, supporting Huawei's compute interconnect standard for AI hyperscale clusters.
• 爱芯元智 (Axera Semiconductor)coreStrategic or Co-development Partner · 1 June 2025Deep DDR IP partnership spanning early chip integration through mass production. NIUXIN's DDR IP enables Axera's AI perception and edge computing chips, which successfully listed on the Hong Kong Stock Exchange (HK.0600) in February 2026. NIUXIN provided full-process technical support throughout the chip development cycle.
• Multiple domestic DRAM manufacturers (国产DDR5/LPDDR5颗粒厂商)coreTechnology or Integration · 14 May 2025NIUXIN's DDR5 and LPDDR5 IP fully adapted for domestic DDR5/LPDDR5 memory颗粒, successfully completing the full domestic chain from interface IP to physical memory颗粒, from design tools to manufacturing process. Enables customers to complete full system design verification and mass production without relying on overseas memory brands.
• 中芯国际/华虹/三星/华力 (SMIC, HHGrace, Samsung, HLMC and other foundries)coreTechnology or Integration · 18 December 2023Five major foundry partnerships covering multiple process nodes from 180nm to 7nm. Enables NIUXIN to offer IP across a wide range of process technologies including both mainstream advanced and domestic processes.
• 锐杰微科技集团 (Riguard Micro)majorImplementation/ SI/ Consulting Partner · 12 December 2023Strategic partnership for Chiplet and advanced packaging. Riguard provides advanced packaging design simulation and mass manufacturing capabilities; NIUXIN provides interface IP. Combined capabilities offer complete packaging and test solutions for complex chips, supporting domestic chip localization.
• CETC Automotive Chip Technology Research Center (中电科汽车芯片技术发展研究中心)coreStrategic or Co-development Partner · 24 July 2023Strategic cooperation covering automotive functional safety design, high-speed in-vehicle information transmission and security control technology research, and IP licensing. Focus areas include automotive HD video transmission and automotive ethernet control, targeting critical automotive chip applications.
• Harbin Institute of Technology Shenzhen (哈工大深圳)majorStrategic or Co-development Partner · 21 July 2023University-industry collaboration with Harbin Institute of Technology. NIUXIN Chairman Luan Changhai is an alumnus. Multiple student delegations have visited NIUXIN headquarters. Joint promotion of产学研 integration and talent cultivation in semiconductor interface IP.
• UCIe Consortium (通用Chiplet互连标准产业联盟)coreTechnology or Integration · 29 April 2022NIUXIN became one of the first domestic IP companies to join the UCIe (Universal Chiplet Interconnect Express) industry consortium, co-founded by Intel, AMD, ARM, Qualcomm, Samsung, TSMC, and others. Contributes to Chiplet interface standardization and provides UCIe-compliant die-to-die interconnect IP.

Scale indicators9 records

Recent moves9 records

Expansion highlights7 records

Direct peers

• Faraday Technology: Taiwan-based ASIC and IP provider offering design services and a broad IP portfolio including interface, memory, and processor IP. Comparable in offering both IP licensing and turnkey design services to fabless and IDM customers in Asia.
• Arteris: Provides network-on-chip (NoC) and chiplet interconnect IP for SoC designs. Comparable as a pure-play IP vendor focused on chip-to-chip and on-chip interconnect, overlapping with Niuxin's D2D/Chiplet IP roadmap and serving similar AI/data center end markets.
• Alphawave Semi: Specialist in high-speed SerDes and connectivity IP for data center and AI applications, including 112G/64G SerDes and UCIe IP. Closest pure-play comp on advanced-node SerDes, though focused on global hyperscaler customers.
• ICT (Innovation Communications Technology / 芯动科技): China-based high-speed interface IP provider offering DDR, SerDes, PCIe, and UCIe IP for domestic fabless customers. The closest domestic peer to Niuxin, competing for the same Chinese AI/automotive/5G chip design wins.
• VeriSilicon: China-headquartered, US-listed semiconductor IP platform offering IP licensing, chip design services, and turnkey solutions. Directly competes with Niuxin in DDR, SerDes, and other interface IP, and serves a similar Chinese fabless customer base with an overlapping one-stop service model.
• eMemory Technology: Taiwan-headquartered IP company specializing in NVM and logic/analog IP. Comparable business model and geographic positioning in Asia, though product categories are largely complementary rather than directly competitive with Niuxin's interface IP.
• M31 Technology: Taiwan-based fabless IP company offering interface IP including PCIe, DDR, USB, and SerDes. Comparable business model (IP licensing to fabless customers) and overlapping product categories, though with stronger foundry process breadth and a longer track record.

Broad incumbents

• Cadence: Provides interface IP including PCIe, DDR, and SerDes alongside its EDA tools. Competes head-to-head with Niuxin for high-end interface IP sockets at Chinese semiconductor companies.
• Synopsys: Global leader in EDA and semiconductor IP, including DesignWare SerDes, DDR, PCIe, and UCIe IP. Sets the performance and breadth benchmark Niuxin must meet; competes for the same Chinese fabless customers on flagship programs.
• Semtech: Provides high-performance SerDes, mixed-signal, and connectivity IP and ICs across data center, networking, and consumer markets. Overlaps with Niuxin's SerDes portfolio at the high end and represents a competitor on global AI infrastructure programs.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat5 records

Key risks6 records

Key highlights7 records

Customer concentration

Compliance4 records

Revenue estimate

Valuation estimate

Number of profiles

Profiles10 records

Subsidiaries3 records

Funding overview

Funding rounds2 records

Investors9 records

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Niuxin Semiconductor