What Dolphin Technology does

Dolphin Technology, Inc. is a privately held semiconductor intellectual property (IP) company founded in November 1996 by Mo Tamjidi and headquartered in San Jose, California. The company sells silicon-proven IP blocks to fabless semiconductor companies, SoC design teams, and ASIC/FPGA developers targeting applications in AI processors, high-performance computing, automotive (AEC-Q100), and IoT. Its core product categories span Memory (Memory Compilers for SRAM/ROM/Register Files and Specialty Memory including Multi-Port Register Files, CAM, and TCAM), General Purpose and Specialty I/O, Standard Cell Libraries (~5,000+ customizable cells per node), DDR PHY (hardened Combo DDR4/3/2 and LPDDR5/4x/4/3/2 up to 4266 Mbps, DFI 4.0 compliant), PLL/DLL, SERDES, and Memory Controllers. A separate Soft IP portfolio covers Memory Interface IPs, System and Peripheral IPs (RTC, TTC, WDT, DMA, PCIe Gen5, UCIe, CXL), Interface IPs (I2C, I3C, I2S, SPI, GPIO, UART, JTAG, PWM, AMBA), and foundational DolphinWare building blocks. All products are qualified across foundry process nodes from 250nm through 2nm at TSMC, Global Foundries, UMC, and IBM.

Dolphin operates a sales-led, NDA-gated go-to-market: prospective customers access non-NDA Product Overviews as PDFs, request detailed datasheets under NDA, and obtain quotes via a web request form. Pricing is not publicly disclosed; licensing is structured as multi-year contracts with terms negotiated through direct sales. The company claims more than 100 customers and hundreds of completed design projects, with named references including Tilera, Sigma Designs, GEO Semiconductor, and Juniper Networks. Proprietary technology is anchored by trademarked compiler families (RAMpiler, RAMpiler+, ROMpiler, CAMpiler) that provide redundancy and customization for memory blocks.

The business model is licensing- and royalty-based against a broad IP catalog. The company is privately held and bootstrapped (no disclosed funding rounds or institutional investors) and is led by founder Mo Tamjidi as President since inception. Recent strategic activity centers on next-generation architectures: a 5nm FF testchip tapeout (October 2020) and 6nm FF testchip tapeout (March 2021) anchor leading-edge credibility, and in February 2026 Dolphin joined the YorChip-led Physical AI Chiplet Ecosystem (P.A.C.E.) alongside QuickLogic, Everspin, and Blumind to co-develop interoperable, reusable chiplets. The company's competitive position rests on process-node breadth, silicon-proven quality, and protocol-standard compliance rather than on AI-native capabilities or scale of R&D spending.

Name

Dolphin Technology

Legal name

Dolphin Technology, Inc.

Website

https://dolphin-ic.com

Company type

Private

Founded year

1996

Operating status

Operating

Headcount range

101–250 employees

Short description

Dolphin Technology is a private, founder-led semiconductor IP company selling silicon-proven memory, I/O, standard-cell, DDR PHY, and soft IP blocks to SoC design teams across AI, HPC, automotive, and IoT applications, qualified from 250nm to 2nm at TSMC, Global Foundries, UMC, and IBM.

Ownership category

akta.pro rank

Product category

Semiconductor Intellectual Property

NAICS

Semiconductor and Related Device Manufacturing (334413)

SIC

Semiconductors & Related Devices (3674)

akta.pro primary industry

Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security) (HDAHAFAF)

akta.pro secondary industries

Silicon IP Subsystems & Chiplet IP (Die-to-Die, UCIe, NoC, I/O chiplets) (HDAHAFAH), IP Enablement, Characterization & Porting Services (HDAHAFAI)

Keywords

• Semiconductor IP blocks
• Memory compilers
• Standard cell libraries
• DDR PHY IP
• SoC design IP

Headquarters

HQ city

San Jose

HQ country

United States

HQ region

North America

Offices1 record

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Marketing or Sales, Infrastructure

Revenue model

1. Semiconductor IP Licensing: Dolphin Technology generates revenue through licensing silicon-proven IP blocks to semiconductor companies and SoC design teams. This includes Memory Compilers, Specialty Memory, I/O products, Standard Cells, DDR PHY, and Soft IPs. Pricing is quote-based with NDA required for detailed datasheets.

Pricing tiers

Go-to-market motion1 record

Distribution channels1 record

Marketing channels1 record

Core offering

Dolphin Technology licenses silicon-proven semiconductor intellectual property (IP) blocks for System-on-Chip (SoC) and ASIC/FPGA designs. Its portfolio includes Memory Compilers (SRAM, ROM, Register Files), Specialty Memory (Multi-Port RF, CAM), General Purpose and Specialty I/O, Standard Cell Libraries, DDR PHY, PLL/DLL, SERDES, Memory Controllers, and a comprehensive Soft IP portfolio (PCIe, UCIe, CXL, I2C, I3C, SPI, UART, JTAG, PWM, AMBA, RTC, TTC, WDT, DMA, and verification IPs). Products are delivered across foundry process nodes from 250nm to 2nm at TSMC, GlobalFoundries, UMC, and IBM.

Product overview

Dolphin Technology provides a comprehensive portfolio of semiconductor IP solutions for SoC design teams, encompassing both hardened/compiled IP and soft IP. The core product categories include Memory (Memory Compilers for SRAM/ROM/Register Files, Specialty Memory including Multi-Port RF and CAM), I/O (General Purpose I/O and Specialty/Bus-specific I/O), Standard Cell Libraries (~5000+ cells), DDR PHY (hardened Combo PHY supporting DDR4/3/2 and LPDDR5/4x/4/3/2), PLL/DLL (programmable and fully digital solutions), SERDES, and Memory Controllers. The Soft IP portfolio includes Memory Interface IPs (SDRAM DDR Controller, eMMC/SD Controller), System & Peripheral IPs (RTC, TTC, WDT, DMA, PCIe, UCIe, CXL), Interface IPs (I2C, I3C, I2S, SPI, SSI, GPIO, UART, JTAG, PWM, AMBA Bus), Specific IPs (Temperature Monitor, Process Monitor), and DolphinWare foundational IPs (Control Logic, Arithmetic, Logic Components, Data Integrity, Verification IPs). All products are available across multiple foundry technology nodes from 2nm to 250nm, primarily supporting TSMC, Global Foundries, UMC, and IBM processes. The company was founded in 1996 and has completed hundreds of design projects for demanding customers.

Differentiator

Problem solved

Functional benefit

Products and services

• Memory Compilers Silicon-proven memory compiler IP that generates SRAM, Dual-port SRAM, ROM, and Register Files with support for varying aspect ratios, redundancy schemes, and VT variations across multiple foundry process nodes. Used by SoC design teams to instantiate on-chip memory optimized for density, power, and speed.
• Specialty Memory Specialty memory IP including ROM (Diffusion and Via Programmable), Multi-Port Register Files with configurations such as 1W/4R, 3W/3R, 1W/8R, 2W/4R, 3W/5R, and CAM (Binary BCAM, Ternary TCAM, CAM). Targeted at SoC designs needing custom memory configurations and content-addressable lookup.
• General Purpose I/O (GPIO) General Purpose I/O IP including GPIO High Voltage Tolerant, GPIO High Voltage Capable, GPIO High Voltage Tolerant Failsafe, and GPIO High Voltage Capable Failsafe options with crystal oscillator pads. Used by SoC designers for standard pad ring implementation across foundry process nodes.
• Special Purpose I/O Bus-specific Specialty I/O products including LVDS Tx/Rx, LVDS/GPIO Combo, DDR4/3 and LPDDR4/3 Combo, eMMC I/O, SD 2.0 I/O, SD UHS2 I/O, I2C I/O, I3C I/O, I2S I/O, ONFI, MDIO, SSTL, HSTL, CML, and RGMII. Optimized for ultra-high performance across foundry processes.
• Standard Cell Libraries Standard Cell libraries with approximately 5000+ fully customizable cells optimized for speed, routability, power, and density, available in Multi-VT (SVT, HVT, LVT) and Multi-channel configurations across process technologies from 2nm to 250nm. Used as the foundation library for SoC synthesis and place-and-route.
• DDR PHY Hardened Combo DDR4/3/2 PHY and LPDDR5/4x/4/3/2 PHY IP supporting speeds up to 4266 Mbps, DFI 4.0 compliant, with slew rate control, per-bit de-skew, gate training, read/write leveling, and built-in self test. Used by SoC teams integrating high-speed DRAM interfaces.
• PLL and DLL Programmable PLL Compiler with low jitter across PVT variations (input 25MHz-200MHz, output up to 2GHz) and a fully digital DLL solution with frequency range from 40MHz to 1GHz. Used for clock generation and management in SoC designs.
• SERDES IP Serializer/Deserializer IP for high-speed data transmission in SoC designs. Used by chip designers implementing high-speed serial links between chips or across boards.
• SDRAM DDR Memory Controller High-performance DDR4/3/2 SDRAM and LPDDR5/4x/4/3/2 SDRAM Memory Controller soft IP, DFI 4.0 compliant, supporting speeds up to 4266 Mbps with multi-port configurable AXI4 interface, built-in training, and intelligent bank management. Pairs with Dolphin's DDR PHY for complete DRAM subsystem solutions.
• Soft IP Portfolio (Interface and Controller IPs) Comprehensive Soft IP portfolio including Memory Interface IPs (eMMC 5.1, SD-SDIO 4.0/UHS-II), System and Peripheral IPs (RTC, TTC, WDT, DMA, PCIe 5.0/4.0/3.1/2.1/1.1, UCIe, CXL), Interface IPs (I2C, I3C, I2S, SPI, SSI, GPIO, UART/USART, JTAG TAP, PWM, AMBA APB/AHB/AXI/AXI-Lite, Quad SPI, Octal SPI), and specialty IPs (Temperature Monitor, Process Monitor). Used by ASIC/FPGA and SoC design teams as building blocks for complete chip integration.
• DolphinWare IP Collection of fundamental soft IP building blocks including Control Logic (Arbiter, FIFO), Arithmetic Components (Math operator, Converter), Logic Components (Counter, Register, Mux), Data Integrity (Encoder, Decoder, Error Correction), and Verification IPs (AXI4, APB, SD4.0/UHS-II, I2C, I3C, I2S). Used by SoC designers to source low-level functional blocks and verification IP from a single vendor.

Quantifiable outcome

• Accelerates time to market for IC design teams through design reuse and silicon-proven IP
• +2 more outcomes

Named customers4 records

Segments4 records

Ideal customer profiles4 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature5 records

Partnerships

Four partnerships are on record, tiered flagship and core.

• YorChipflagshipStrategic or Co-development Partner · 17 February 2026YorChip announced the launch of the Physical AI Chiplet Ecosystem (PACE) with multiple semiconductor IP partners including Dolphin Technology. The ecosystem aims to co-develop interoperable and re-useable Chiplets to address high development costs and long time-to-market that have hindered wider Chiplet adoption. The initiative enables system customers to leverage PACE Chiplets to get to market faster while saving millions of dollars in duplicative IP license fees, NRE costs, and mask costs. YorChip is providing a free Multi Project Wafer (MPW) license of its UCIe PHY for 28nm TSMC node.
• QuickLogiccoreStrategic or Co-development Partner · 17 February 2026Part of the Physical AI Chiplet Ecosystem (PACE) initiative co-developing interoperable and re-useable Chiplets with Dolphin Technology and other partners.
• Everspin TechnologiescoreStrategic or Co-development Partner · 17 February 2026Part of the Physical AI Chiplet Ecosystem (PACE) initiative co-developing interoperable and re-useable Chiplets with Dolphin Technology and other partners.
• BlumindcoreStrategic or Co-development Partner · 17 February 2026Part of the Physical AI Chiplet Ecosystem (PACE) initiative co-developing interoperable and re-useable Chiplets with Dolphin Technology and other partners.

Scale indicators4 records

Recent moves6 records

Expansion highlights5 records

Direct peers

• Cadence: Major EDA vendor with a significant IP portfolio (memory, PHY, controllers, Tensilica processors) sold into SoC design teams. Overlaps with Dolphin's memory, DDR PHY, and soft IP offerings and competes head-to-head for foundation-IP design wins.
• Rambus: Specialist in high-speed memory and interface IP (DDR PHY, HBM, PCIe/CXL controllers), serving semiconductor and chiplet markets. Closely comparable to Dolphin's DDR PHY and memory controller offerings and a peer for design wins in memory-heavy AI/HPC chips.
• Synopsys: Largest semiconductor IP vendor with a DesignWare portfolio covering memory compilers, standard cells, DDR PHY, PCIe, and interface IP across leading process nodes. Directly comparable to Dolphin across the entire foundation-IP stack and the dominant competitive benchmark in this category.
• M31 Technology: Independent IP provider offering standard cell libraries, memory compilers, GPIO, and interface IP across TSMC, UMC, and other foundries. Closely comparable to Dolphin's foundation IP portfolio and a peer for standard cell and memory compiler licensing wins.
• Silicon Creations: Independent IP vendor specializing in PLLs, SerDes, and high-speed mixed-signal IP across multiple foundries and process nodes. Comparable to Dolphin's PLL/DLL and SerDes product lines and a peer for analog/mixed-signal IP licensing engagements.
• Alphawave Semi: Provider of high-speed connectivity IP including SerDes, PCIe, CXL, UCIe, and DDR PHY on advanced process nodes. Directly comparable to Dolphin's interface IP at leading nodes and a competitor for chiplet interconnect IP business.
• VeriSilicon: Semiconductor IP and chip design services platform offering GPU, video, DSP, foundation IP, and SoC services across multiple foundries. Comparable in breadth of IP offerings and customer profile, particularly for fabless customers seeking bundled IP-plus-services.

Broad incumbents

• Arm: Dominant processor IP provider that increasingly bundles foundation IP (memory, interconnect, controllers) around its core offerings. Comparable as a SoC foundation-IP vendor, though differentiated by processor IP ownership; competes for the same SoC budget allocation.

Emerging players

• eMemory Technology: Specialist in embedded NVM and security IP (OTP/MTP/Flash) licensed to semiconductor companies. Adjacent rather than directly overlapping, but comparable as an independent IP vendor competing for design-win slots within the same customer SoC teams.
• Mobiveil: Provider of IP cores for DDR/LPDDR memory controllers, PCIe, NAND flash controllers, and other SoC interface IP. Overlaps directly with Dolphin's memory controller, PCIe, and eMMC/SD controller products at a smaller scale.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat5 records

Key risks5 records

Key highlights6 records

Customer concentration

• LinkedInlinkedin.com/company/dolphin-technology

Revenue estimate

Valuation estimate

Number of profiles

Profiles1 record

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Dolphin Technology