Design And Reuse
D&R provides a global collaboration network for sharing design resources in the electronics SoC industry.
- Company typePrivate
- Founded1997
- HeadquartersGrenoble, France
- Headcount1–10
- GTM typeB2B
- OfferingDigital Commerce or Content
What Design And Reuse does
D&R provides a global collaboration network for sharing design resources in the electronics SoC industry.
Design And Reuse firmographics
Firmographics- Name
- Design And Reuse
- Legal name
- Design And Reuse
- Website
- https://www.design-reuse.com
- Company type
- Private
- Founded year
- 1997
- Operating status
- Operating
- Headcount range
- 1–10 employees
- Short description
- D&R provides a global collaboration network for sharing design resources in the electronics SoC industry.
- Ownership category
- akta.pro rank
Design And Reuse industry classification
Industry- Product category
- Semiconductor IP Marketplace
- NAICS
- Semiconductor and Other Electronic Component Manufacturing (33441)
- SIC
- Semiconductors & Related Devices (3674)
- akta.pro primary industry
- Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security) (HDAHAFAF)
- akta.pro secondary industries
- Electronics Components & OEM/ODM Sourcing Marketplaces (CRAFAHAM), Design Services & ASIC/SoC Implementation (EDA-Adjacent) (HDAHAFAL), IP Enablement, Characterization & Porting Services (HDAHAFAI)
Keywords
Where Design And Reuse is headquartered
LocationHeadquarters
- HQ city
- Grenoble
- HQ country
- France
- HQ region
- Europe
Offices1 record
Markets served
Design And Reuse business model
Business model- GTM type
- B2B
- Offering type
- Digital Commerce or Content
- Cost components
- Technology or R&D, Marketing or Sales, Personnel, Operations
Revenue model
- IP Core Catalog/Marketplace: Platform facilitates transactions and listings between IP vendors and semiconductor designers. Revenue likely derives from vendor listing fees, premium placement, and transaction facilitation.
Go-to-market motion1 record
Distribution channels2 records
Marketing channels4 records
Design And Reuse product offering
Product offeringCore offering
Design And Reuse operates a B2B online marketplace cataloging 16,000+ semiconductor IP (SIP) cores from 450 vendors across 16 technology categories for SoC designers. The platform enables IP discovery, vendor comparison, and ASIC design resource selection across foundries (TSMC, Samsung, GlobalFoundries, SMIC, Intel, UMC) supplemented by the IP-SoC Days event series and a Design Partners directory.
Product overview
Design And Reuse operates as a B2B semiconductor intellectual property (SIP) marketplace and industry intelligence platform. The core offering is the IP Core Catalog Platform, which provides searchable access to over 16,000 IP cores from 450 vendors across 17 categories including Foundation IP, Analog IP, Interface IP, Processor IP, RISC-V, AI Core, Automotive IP, Security IP, IoT, Media IP, and Verification IP. The platform is complemented by ASIC Technology services connecting users with foundry partners (TSMC, Samsung, GlobalFoundries, Intel, UMC, and others), and an FPGA/eFPGA corner listing cores from Xilinx AMD, Altera, Menta, and other vendors. Additional offerings include the IP-SoC Days event series, a design partner directory, and aggregated industry news covering AI, security, automotive, RISC-V, and semiconductor sectors.
Differentiator
Problem solved
Functional benefit
Products and services
- IP Core Catalog Platform Searchable B2B marketplace cataloging 16,000+ semiconductor IP cores from 450 vendors across 16 technology categories, enabling SoC designers to discover, evaluate and procure intellectual property blocks for chip design.
- Foundry Services (ASIC Technology) ASIC foundry selector connecting users with foundry partners including TSMC, Samsung, GlobalFoundries, SMIC, Intel, UMC and others for semiconductor manufacturing across technology nodes.
- FPGA and eFPGA Corner FPGA intellectual property corner offering access to cores from FPGA and eFPGA vendors including Xilinx AMD, Altera, Menta, Lattice, Quicklogic, Achronix and Efinix.
- IP-SoC Days Events Industry conference series including IP-SoC Silicon Valley, IP-SoC China, IP-SoC South Korea and IP-SoC EU, connecting semiconductor professionals, showcasing IP developments and facilitating vendor-buyer interactions.
- Design Partners / ASIC & IP Design Center Directory Directory of design partners and ASIC/IP design centers providing custom chip design services, accessed through the platform by SoC teams seeking third-party design execution support.
- News and Industry Intelligence Aggregated semiconductor industry news and editorial content covering AI/ML, Security, Automotive, RISC-V, Design Platforms, Foundries, IoT, Networking and Audio/Video sectors, delivered as blogs, articles and the D&R SoC News Alert.
Quantifiable outcome
- 16,000 IP cores searchable across 16 technology categories
Companies that use Design And Reuse
Customer profileSegments1 record
Ideal customer profiles2 records
Design And Reuse technology and API
TechnologyTechnology focussed Yes
API detail
- Has API
- No
- API docs
- API detail
Core technology
AI maturity
App detail
Feature1 record
Design And Reuse partnerships and signals
Strategic signalPartnerships
One partnership is on record.
- D&R ChinaminorRelated entity operating design-reuse-china.com for Chinese market coverage. Appears to be an affiliated regional operation rather than a formal partnership.
Scale indicators2 records
Recent moves6 records
Expansion highlights2 records
Design And Reuse competitors and assessment
Company assessmentBroad incumbents
- Synopsys: Synopsys operates the DesignWare IP portfolio and an integrated IP discovery channel within its EDA platform. It is comparable to D&R because it offers one of the largest commercially accessible IP catalogs and competes with D&R's neutral marketplace by bundling IP selection with synthesis, verification, and design tools.
- Cadence Design Systems: Cadence fields the Cadence IP portfolio and previously operated the ChipEstimate IP marketplace concept, which directly overlapped with D&R's neutral IP catalog. Cadence is comparable as the dominant EDA incumbent with embedded IP discovery and licensing.
- Siemens EDA (Mentor Graphics): Siemens EDA provides IP, verification, and design platform offerings as part of a broad EDA suite. It is comparable to D&R because it competes for designer attention during IP selection and increasingly integrates partner/third-party IP into its flows, partly cannibalizing neutral catalog portals.
Direct peers
- Arteris: Arteris is a NoC interconnect IP vendor that publishes its own content, case studies, and product launches on D&R's site. It is comparable as a featured IP vendor on the platform and as a competitor that increasingly markets IP directly to SoC designers, reducing dependence on neutral catalogs.
- CAST, Inc. CAST is a long-standing independent IP vendor (processors, interconnects, automotive/functional safety IP such as the SENT/SAE J2716 receiver) that prominently lists on D&R. CAST is comparable as a participating IP vendor and as an exemplar of the multi-vendor IP ecosystem that D&R's marketplace aggregates.
- T2M-IP: T2M is an independent semiconductor IP vendor and active listor on D&R, marketing wireless, interface, and analog IP. It is comparable as a participating IP vendor on the platform and as a representative of the long tail of IP suppliers that the marketplace exists to consolidate.
- Agile Analog: Agile Analog designs mixed-signal/analog IP and is featured on D&R as both a vendor and a content contributor. It is comparable as a listed IP vendor and as a newer entrant whose growth depends partly on aggregator marketplaces like D&R for discovery.
Others
- Semiconductor Engineering (industry media): Semiconductor Engineering is a deep-technical media outlet covering IP, EDA, and chip design. It is comparable to D&R as an adjacent content/community play targeting the same SoC design audience, competing for designer mindshare and advertising/sponsorship dollars.
- SemiWiki: SemiWiki is a semiconductor industry community and content platform that hosts executive interviews, blogs, and IP vendor marketing. It is comparable to D&R as a community-driven channel that overlaps with D&R's blog/news surface for IP discovery and vendor promotion.
Emerging players
- eSilicon / MosChip Technologies (ASIC design partners): MosChip is a design services and ASIC/IP partner firm that publishes content on D&R. It is comparable as a 'design partner'/'ASIC & IP Design Center' participant on D&R's platform and competes in the same buyer-facing workflow of IP-plus-design-service sourcing.
Market position
Strengths5 records
Weaknesses5 records
Competitive moat3 records
Key risks6 records
Key highlights6 records
Customer concentration
Design And Reuse social profiles
Digital presenceDesign And Reuse financial estimates
Financial estimateRevenue estimate
Valuation estimate
Design And Reuse leadership team
Management profileNumber of profiles
Design And Reuse funding detail
Funding detailFunding overview
Funding rounds
Investors
Funding detail is available on the Subscription and Enterprise plan.Contact sales →
Design And Reuse M&A and investment
M&A and investmentM&A
Investments
M&A and investment is available on the Subscription and Enterprise plan.Contact sales →
Frequently asked questions about Design And Reuse
What does Design And Reuse do?
Design And Reuse operates a B2B online marketplace cataloging 16,000+ semiconductor IP (SIP) cores from 450 vendors across 16 technology categories for SoC designers. The platform enables IP discovery, vendor comparison, and ASIC design resource selection across foundries (TSMC, Samsung, GlobalFoundries, SMIC, Intel, UMC) supplemented by the IP-SoC Days event series and a Design Partners directory.
When was Design And Reuse founded?
Design And Reuse was founded in 1997. It employs 1 to 10 people.
Where is Design And Reuse based?
Design And Reuse is headquartered in Grenoble, France, in the Europe region.
How does Design And Reuse make money?
One revenue line is on record: IP Core Catalog/Marketplace.
Who are Design And Reuse's main competitors?
Broad incumbents on record are Synopsys, Cadence Design Systems and Siemens EDA (Mentor Graphics). Direct peers are Arteris, CAST, Inc., T2M-IP and Agile Analog. Others are Semiconductor Engineering (industry media) and SemiWiki. eSilicon / MosChip Technologies (ASIC design partners) is listed as an emerging player.
Does Design And Reuse have an API?
No public API is recorded for Design And Reuse.
What industry is Design And Reuse in?
Design And Reuse's product category is Semiconductor IP Marketplace. Its primary akta.pro industry code is HDAHAFAF, Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security), with a secondary code of CRAFAHAM, Electronics Components & OEM/ODM Sourcing Marketplaces. Its NAICS code is 33441 and its SIC code is 3674.