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Mont-Blanc

Full company profile

uuid002zh58

Namestring
Mont-Blanc
Legal namestring
Mont-Blanc Project
Company typeenum
Private
Founded yearint
2011
Descriptiontext

Mont-Blanc is a European research consortium project, not a commercial enterprise, that operated from 2011 to 2020 across four sequential phases (Mont-Blanc 1, 2, 3, and Mont-Blanc 2020) to develop energy-efficient High-Performance Computing (HPC) systems based on low-power ARM-based mobile Systems-on-Chips (SoCs). Its core technical work spanned a large-scale prototype deployment of over 1,000 mobile SoCs, conversion of scientific libraries and runtime systems to ARMv8, a complete development tools ecosystem for debugging and performance analysis, the Dibona industrial prototype test platform, a multi-scale simulation and performance modelling framework, and a low-power Network on Chip (NoC) IP intended for inclusion in the European Processor Initiative (EPI) processor for European Exascale supercomputers. The consortium was led by three core partners (Arm, Bull/Atos, and Barcelona Supercomputing Center), with later phases adding SMEs (Kalray, Semidynamics, Sipearl) and research partners (CEA, JSC).

Mont-Blanc's business model was publicly funded European research rather than commercial revenue generation. Funding flowed from European Commission/Horizon-style grants across four project phases; commercial partners (notably Atos) integrated project outcomes into their HPC product lines, and academic partners used outcomes for further research. There is no disclosed pricing, no commercial product, and no revenue stream from the consortium itself. Customers and beneficiaries were scientific research communities requiring energy-efficient HPC, the European HPC industry seeking indigenous processor capability, and industrial partners exploiting developed technologies commercially. Marketing and dissemination relied on peer-reviewed publications, conference presentations, workshops, hackathons, tutorials, a MOOC, and trade-show booths. The project won multiple HPCwire awards in 2017, including Best HPC Collaboration and Top 5 New Products or Technologies to Watch (for Atos's implementation).

Short descriptiontext

Mont-Blanc is a European research consortium (2011-2020) that developed energy-efficient ARM-based High-Performance Computing prototypes, software ecosystems, and processor IP for European Exascale supercomputers, serving the scientific community and industrial HPC partners.

Operating statusenum
Operating
Ownership categoryenum
Headcount rangeband
1–10
akta.pro rankint
HeadquartersLes Clayes-sous-bois, France
HQ citystring
Les Clayes-sous-bois
HQ countrystring
France
HQ regionstring
Europe
Markets served

Serves global market

Keyword5 values
energy-efficient HPC, ARM-based supercomputing, Exascale computing, HPC processor design, low-power computing
Industry3 codes
1High-Performance Computing (HPC) Cluster Nodes & Systems
CodeHDACABAHPrimaryYes
2HPC Clusters & Scale-Out Compute (x86/ARM)
CodeHDACAOABPrimaryNo
3HPC-as-a-Product / On-Prem Managed HPC (Integrated Hardware + Ops)
CodeHDACAOAKPrimaryNo
Product category
High-Performance Computing Research
Social media profiles2 records
GTM motion1 record

Each record includes

Type, Description, Source

Revenue model1 record
1Research Project Funding
TypeLicensing Royalties
Description

The Mont-Blanc project was a publicly funded European research initiative (2011-2020) rather than a commercial enterprise. The consortium received funding to develop energy-efficient HPC solutions and did not generate commercial revenue. Commercial partners integrated outcomes into their products, but the project itself was not revenue-generating.

montblanc-project.eu
Marketing channels6 records

Each record includes

Title, Type, Stage, Description, Source

Distribution channels4 records

Each record includes

Title, Type, Scope, Target buyer, Description, Source

Cost components4 values
Personnel, Technology or R&D, Operations, Infrastructure
GTM typeB2B and B2C
B2B and B2C
Offering typeSoftware
Software
Core offering1 text field

Mont-Blanc is a European research consortium that develops energy-efficient High-Performance Computing (HPC) solutions using low-power ARM-based mobile processors for Exascale computing. The consortium produces an ARM-based HPC processor platform, a complete ARMv8 software ecosystem, a low-power Network on Chip (NoC) IP, and a multi-scale performance simulation environment across four sequential project phases.

Differentiator
Functional benefit
Problem solved
Quantifiable outcome1 of 3 values shown
  • Deployment of large ARM-based prototype with over 1,000 mobile SoCs
+2 more records
Product overview1 text field

Mont-Blanc is a multi-phase European HPC project developing a family of energy-efficient processors for the Exascale computing era. The initiative consists of four sequential project phases: Mont-Blanc 1 (2011-2015) established the foundational ARM-based prototype using over 1,000 mobile SoCs; Mont-Blanc 2 (2013-2017) built the software ecosystem and ARMv8 development tools; Mont-Blanc 3 (2015-2018) delivered the Dibona industrial prototype and performance modelling environment; and Mont-Blanc 2020 (2017-2020) produced low-power Network on Chip IP for the European Processor Initiative (EPI). The project is a consortium effort involving Arm, Atos/Bull, Barcelona Supercomputing Center (BSC), and various European research partners and SMEs.

Product and service5 records
1Mont-Blanc HPC Processor Platform
CategoryHigh-Performance Computing Research Platform
Description

European HPC initiative developing energy-efficient processor solutions for the Exascale era, based on low-power mobile ARM architectures. The platform encompasses all four project phases (Mont-Blanc 1, 2, 3, and Mont-Blanc 2020) that collectively explore and develop ARM-based supercomputing systems for the scientific research community and industrial partners.

2Dibona Platform
CategoryHPC Industrial Prototype
Description

Industrial prototype test platform that enabled performance extrapolation assessment using real HPC applications on ARM-based architectures, designed for the European HPC research and industrial community.

3ARM-Based HPC System Software Stack
CategoryHPC Software Ecosystem
Description

A fully functional system software stack for ARM-based supercomputers, including scientific libraries, runtime systems converted to ARMv8, and a development tools ecosystem for debugging, performance analysis, performance prediction, and automated kernel optimisation. Intended for HPC researchers and industrial system integrators.

4Network on Chip (NoC) IP
CategoryProcessor IP
Description

Low-power Network on Chip intellectual property developed for energy-efficient HPC applications, designed to be included in the next generation European Processor Initiative (EPI) processor for European Exascale supercomputers. Targeted at processor designers and HPC system integrators.

5Performance Modelling Environment
CategoryHPC Simulation Software
Description

Multi-scale simulation environment that combines various tools to address different abstraction levels of simulated HPC systems, with options to reduce simulation time by simulating representative application sections. Used outside the project by academic and research institutions for HPC architecture analysis.

Scale indicator3 records

Each record includes

Type, Value, Description, Source

Partnership6 partners
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2017-01-01
Description

CEA is a prominent research partner in the Mont-Blanc 2020 consortium, bringing expertise from French atomic energy research to contribute to HPC processor design and energy-efficient computing research.

2JSC (Jülich Supercomputing Centre)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2017-01-01
Description

JSC (Jülich Supercomputing Centre) is a research partner in the Mont-Blanc 2020 consortium, contributing significant supercomputing expertise and infrastructure to the European HPC development effort.

montblanc-project.eu
3European Processor Initiative (EPI)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2017-01-01
Description

The Mont-Blanc 2020 project developed IP for a low-power Network on Chip that will be included in the next generation EPI processor - the European Processor for HPC. This represents the foundational contribution to Europe's flagship processor development initiative.

montblanc-project.eu
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2011-10-01
Description

Arm has been one of the three key partners throughout all Mont-Blanc projects since October 2011. As the designer of ARM processors, Arm contributed the foundational low-power mobile processor technology that enabled the project's energy-efficient HPC solutions. The collaboration transferred mobile SoC technology to supercomputing applications.

Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2011-10-01
Description

Bull (Atos Group) has been one of the three key partners throughout all Mont-Blanc projects. Atos contributed technological implementation that won recognition at SC17 as a Top 5 New Product or Technology to Watch. The company integrates Mont-Blanc outcomes into their HPC products and commercial offerings.

Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2011-10-01
Description

The Barcelona Supercomputing Center (BSC) has been one of the three key partners throughout all Mont-Blanc projects. BSC serves as the coordinating research institution and contributes significant HPC research expertise and infrastructure to the consortium.

Recent move5 records

Each record includes

Date, Type, Title, Description, Source

Expansion highlight6 records

Each record includes

Type, Description

Peers10 records
TypeDirect peer
Description

Coordinating research institution and core partner across all Mont-Blanc project phases. BSC operates the MareNostrum supercomputers and contributes significant HPC research expertise, serving as the primary research counterpart in the Mont-Blanc consortium.

TypeDirect peer
Description

Core partner providing the foundational low-power processor architecture at the heart of all Mont-Blanc systems. Arm's processor roadmap and HPC strategy directly determine the long-term viability of the ARM-based HPC approach Mont-Blanc pioneered.

TypeDirect peer
Description

French fabless semiconductor company founded to commercialize the European Processor Initiative's Rhea processor for HPC. SiPearl was an SME partner in Mont-Blanc 2020 and represents the direct commercial spin-out pathway of the technology Mont-Blanc pioneered.

TypeEmerging player
Description

SME partner in Mont-Blanc 2020 focused on low-power manycore processors for HPC and AI workloads. Kalray's MPPA (Massively Parallel Processor Array) architecture directly competes with the same low-power, high-parallelism niche that Mont-Blanc explored.

TypeBroad incumbent
Description

Leading HPC systems provider through the Cray supercomputing portfolio. HPE competes in the same European Exascale procurements (e.g., EuroHPC) that Mont-Blanc's EPI-derived processors target, and represents the established incumbent against which European sovereign efforts must compete.

6European Processor Initiative (EPI)
TypeDirect peer
Description

The successor initiative to Mont-Blanc for European HPC processor development. Mont-Blanc developed NoC IP specifically intended for inclusion in the next-generation EPI processor, making EPI the most direct comparable peer and the entity commercializing the foundational work.

TypeBroad incumbent
Description

Developer of the A64FX ARM-based processor that powered the Fugaku supercomputer — the first ARM-based system to top the Top500. Fujitsu demonstrated that ARM can compete at the HPC frontier, validating the foundational premise of Mont-Blanc's research and serving as a comparable sovereign-HPC effort.

TypeBroad incumbent
Description

Dominant incumbent in HPC through GPU-accelerated computing (DGX systems, Grace CPU) and CUDA ecosystem. NVIDIA's recent ARM-based Grace CPU directly competes with the ARM-HPC trajectory Mont-Blanc helped validate, and represents the larger commercial reality competing against European sovereign efforts.

TypeRegional player
Description

Italian HPC systems integrator and ARM-based cluster provider. Like Mont-Blanc, E4 has built ARM-based HPC solutions and serves the European HPC market with similar low-power, energy-efficient cluster offerings.

TypeDirect peer
Description

One of three core partners throughout all Mont-Blanc project phases, providing technological implementation that won HPCwire recognition at SC17. Atos (through Bull/Eviden) develops the Sequana line of HPC systems and integrates Mont-Blanc outcomes into commercial products.

Market position
Strengths4 records

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Headline, Details, Source

Weaknesses4 records

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Headline, Details, Source

Competitive moat5 records

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Type, Details

Key risks6 records

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Headline, Details, Source

Key highlights6 records

Each record includes

Headline, Details, Source

Customer concentration

Classification, Details

Named customers2 records

Each record includes

Name, Industry, Type, Use case, Source, UUID

Segment2 records

Each record includes

Title, Type, Primary, Description, Pain point addressed, Use case, Source

Ideal customer profile2 records

Each record includes

Profile, Firmographic size, Sales motion, Sales cycle length, Buying structure, Purchase trigger, Buyer persona, Geography, Industry vertical, Primary use case, Description, Pain points, Evidence proof points, Target buyer

Technology focused
Yes
API detail
Has APIbool
No

Docs URL, Description

AI maturity
App detail

Has app

Feature6 records

Each record includes

Title, Differentiator, Description, Source

Core technology
Revenue estimate
Valuation estimate
Number of profiles
No data
No data
Funding overview

Funding stage, Last funding date, Total funding USD

Funding rounds

Each record includes

Round, Amount USD, Date, Pre money valuation, Total investors, Investors, News

Investors

Each record includes

Name, Type, Date of entry, Rounds participated, Website

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Each record includes

Name, Acquisition type, Announced date, Completed date, Status, Website, News

Investment

Each record includes

Name, Round, Announced date, Lead investor, Website, News

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Mont-Blanc

High-Performance Computing Researchmontblanc-project.eu

Mont-Blanc is a European research consortium (2011-2020) that developed energy-efficient ARM-based High-Performance Computing prototypes, software ecosystems, and processor IP for European Exascale supercomputers, serving the scientific community and industrial HPC partners.

What Mont-Blanc does

Mont-Blanc is a European research consortium project, not a commercial enterprise, that operated from 2011 to 2020 across four sequential phases (Mont-Blanc 1, 2, 3, and Mont-Blanc 2020) to develop energy-efficient High-Performance Computing (HPC) systems based on low-power ARM-based mobile Systems-on-Chips (SoCs). Its core technical work spanned a large-scale prototype deployment of over 1,000 mobile SoCs, conversion of scientific libraries and runtime systems to ARMv8, a complete development tools ecosystem for debugging and performance analysis, the Dibona industrial prototype test platform, a multi-scale simulation and performance modelling framework, and a low-power Network on Chip (NoC) IP intended for inclusion in the European Processor Initiative (EPI) processor for European Exascale supercomputers. The consortium was led by three core partners (Arm, Bull/Atos, and Barcelona Supercomputing Center), with later phases adding SMEs (Kalray, Semidynamics, Sipearl) and research partners (CEA, JSC).

Mont-Blanc's business model was publicly funded European research rather than commercial revenue generation. Funding flowed from European Commission/Horizon-style grants across four project phases; commercial partners (notably Atos) integrated project outcomes into their HPC product lines, and academic partners used outcomes for further research. There is no disclosed pricing, no commercial product, and no revenue stream from the consortium itself. Customers and beneficiaries were scientific research communities requiring energy-efficient HPC, the European HPC industry seeking indigenous processor capability, and industrial partners exploiting developed technologies commercially. Marketing and dissemination relied on peer-reviewed publications, conference presentations, workshops, hackathons, tutorials, a MOOC, and trade-show booths. The project won multiple HPCwire awards in 2017, including Best HPC Collaboration and Top 5 New Products or Technologies to Watch (for Atos's implementation).

Mont-Blanc firmographics

Firmographics
Name
Mont-Blanc
Legal name
Mont-Blanc Project
Website
https://montblanc-project.eu
Company type
Private
Founded year
2011
Operating status
Operating
Headcount range
1–10 employees
Short description
Mont-Blanc is a European research consortium (2011-2020) that developed energy-efficient ARM-based High-Performance Computing prototypes, software ecosystems, and processor IP for European Exascale supercomputers, serving the scientific community and industrial HPC partners.
Ownership category
akta.pro rank

Mont-Blanc industry classification

Industry
Product category
High-Performance Computing Research
akta.pro primary industry
High-Performance Computing (HPC) Cluster Nodes & Systems (HDACABAH)
akta.pro secondary industries
HPC Clusters & Scale-Out Compute (x86/ARM) (HDACAOAB), HPC-as-a-Product / On-Prem Managed HPC (Integrated Hardware + Ops) (HDACAOAK)

Keywords

  • Energy-efficient HPC
  • ARM-based supercomputing
  • Exascale computing
  • HPC processor design
  • Low-power computing

Where Mont-Blanc is headquartered

Location

Headquarters

HQ city
Les Clayes-sous-bois
HQ country
France
HQ region
Europe

Markets served

Mont-Blanc business model

Business model
GTM type
B2B and B2C
Offering type
Software
Cost components
Personnel, Technology or R&D, Operations, Infrastructure

Revenue model

  1. Research Project Funding: The Mont-Blanc project was a publicly funded European research initiative (2011-2020) rather than a commercial enterprise. The consortium received funding to develop energy-efficient HPC solutions and did not generate commercial revenue. Commercial partners integrated outcomes into their products, but the project itself was not revenue-generating.

Go-to-market motion1 record

Distribution channels4 records

Marketing channels6 records

Mont-Blanc product offering

Product offering

Core offering

Mont-Blanc is a European research consortium that develops energy-efficient High-Performance Computing (HPC) solutions using low-power ARM-based mobile processors for Exascale computing. The consortium produces an ARM-based HPC processor platform, a complete ARMv8 software ecosystem, a low-power Network on Chip (NoC) IP, and a multi-scale performance simulation environment across four sequential project phases.

Product overview

Mont-Blanc is a multi-phase European HPC project developing a family of energy-efficient processors for the Exascale computing era. The initiative consists of four sequential project phases: Mont-Blanc 1 (2011-2015) established the foundational ARM-based prototype using over 1,000 mobile SoCs; Mont-Blanc 2 (2013-2017) built the software ecosystem and ARMv8 development tools; Mont-Blanc 3 (2015-2018) delivered the Dibona industrial prototype and performance modelling environment; and Mont-Blanc 2020 (2017-2020) produced low-power Network on Chip IP for the European Processor Initiative (EPI). The project is a consortium effort involving Arm, Atos/Bull, Barcelona Supercomputing Center (BSC), and various European research partners and SMEs.

Differentiator

Problem solved

Functional benefit

Products and services

  • Mont-Blanc HPC Processor Platform European HPC initiative developing energy-efficient processor solutions for the Exascale era, based on low-power mobile ARM architectures. The platform encompasses all four project phases (Mont-Blanc 1, 2, 3, and Mont-Blanc 2020) that collectively explore and develop ARM-based supercomputing systems for the scientific research community and industrial partners.
  • Dibona Platform Industrial prototype test platform that enabled performance extrapolation assessment using real HPC applications on ARM-based architectures, designed for the European HPC research and industrial community.
  • ARM-Based HPC System Software Stack A fully functional system software stack for ARM-based supercomputers, including scientific libraries, runtime systems converted to ARMv8, and a development tools ecosystem for debugging, performance analysis, performance prediction, and automated kernel optimisation. Intended for HPC researchers and industrial system integrators.
  • Network on Chip (NoC) IP Low-power Network on Chip intellectual property developed for energy-efficient HPC applications, designed to be included in the next generation European Processor Initiative (EPI) processor for European Exascale supercomputers. Targeted at processor designers and HPC system integrators.
  • Performance Modelling Environment Multi-scale simulation environment that combines various tools to address different abstraction levels of simulated HPC systems, with options to reduce simulation time by simulating representative application sections. Used outside the project by academic and research institutions for HPC architecture analysis.

Quantifiable outcome

  • Deployment of large ARM-based prototype with over 1,000 mobile SoCs
  • +2 more outcomes

Companies that use Mont-Blanc

Customer profile

Named customers2 records

Segments2 records

Ideal customer profiles2 records

Mont-Blanc technology and API

Technology

Technology focussed Yes

API detail

Has API
No
API docs
API detail

Core technology

AI maturity

App detail

Feature6 records

Mont-Blanc partnerships and signals

Strategic signal

Partnerships

Six partnerships are on record, tiered core.

  • CEA (Commissariat à l'énergie atomique et aux énergies alternatives)coreStrategic or Co-development Partner · 1 January 2017CEA is a prominent research partner in the Mont-Blanc 2020 consortium, bringing expertise from French atomic energy research to contribute to HPC processor design and energy-efficient computing research.
  • JSC (Jülich Supercomputing Centre)coreStrategic or Co-development Partner · 1 January 2017JSC (Jülich Supercomputing Centre) is a research partner in the Mont-Blanc 2020 consortium, contributing significant supercomputing expertise and infrastructure to the European HPC development effort.
  • European Processor Initiative (EPI)coreStrategic or Co-development Partner · 1 January 2017The Mont-Blanc 2020 project developed IP for a low-power Network on Chip that will be included in the next generation EPI processor - the European Processor for HPC. This represents the foundational contribution to Europe's flagship processor development initiative.
  • ArmcoreStrategic or Co-development Partner · 1 October 2011Arm has been one of the three key partners throughout all Mont-Blanc projects since October 2011. As the designer of ARM processors, Arm contributed the foundational low-power mobile processor technology that enabled the project's energy-efficient HPC solutions. The collaboration transferred mobile SoC technology to supercomputing applications.
  • Bull (Atos Group)coreStrategic or Co-development Partner · 1 October 2011Bull (Atos Group) has been one of the three key partners throughout all Mont-Blanc projects. Atos contributed technological implementation that won recognition at SC17 as a Top 5 New Product or Technology to Watch. The company integrates Mont-Blanc outcomes into their HPC products and commercial offerings.
  • Barcelona Supercomputing Center (BSC)coreStrategic or Co-development Partner · 1 October 2011The Barcelona Supercomputing Center (BSC) has been one of the three key partners throughout all Mont-Blanc projects. BSC serves as the coordinating research institution and contributes significant HPC research expertise and infrastructure to the consortium.

Scale indicators3 records

Recent moves5 records

Expansion highlights6 records

Mont-Blanc competitors and assessment

Company assessment

Direct peers

  • Barcelona Supercomputing Center (BSC): Coordinating research institution and core partner across all Mont-Blanc project phases. BSC operates the MareNostrum supercomputers and contributes significant HPC research expertise, serving as the primary research counterpart in the Mont-Blanc consortium.
  • Arm: Core partner providing the foundational low-power processor architecture at the heart of all Mont-Blanc systems. Arm's processor roadmap and HPC strategy directly determine the long-term viability of the ARM-based HPC approach Mont-Blanc pioneered.
  • SiPearl: French fabless semiconductor company founded to commercialize the European Processor Initiative's Rhea processor for HPC. SiPearl was an SME partner in Mont-Blanc 2020 and represents the direct commercial spin-out pathway of the technology Mont-Blanc pioneered.
  • European Processor Initiative (EPI): The successor initiative to Mont-Blanc for European HPC processor development. Mont-Blanc developed NoC IP specifically intended for inclusion in the next-generation EPI processor, making EPI the most direct comparable peer and the entity commercializing the foundational work.
  • Atos (Bull / Eviden): One of three core partners throughout all Mont-Blanc project phases, providing technological implementation that won HPCwire recognition at SC17. Atos (through Bull/Eviden) develops the Sequana line of HPC systems and integrates Mont-Blanc outcomes into commercial products.

Emerging players

  • Kalray: SME partner in Mont-Blanc 2020 focused on low-power manycore processors for HPC and AI workloads. Kalray's MPPA (Massively Parallel Processor Array) architecture directly competes with the same low-power, high-parallelism niche that Mont-Blanc explored.

Broad incumbents

  • HPE (Cray): Leading HPC systems provider through the Cray supercomputing portfolio. HPE competes in the same European Exascale procurements (e.g., EuroHPC) that Mont-Blanc's EPI-derived processors target, and represents the established incumbent against which European sovereign efforts must compete.
  • Fujitsu (Fugaku / A64FX): Developer of the A64FX ARM-based processor that powered the Fugaku supercomputer — the first ARM-based system to top the Top500. Fujitsu demonstrated that ARM can compete at the HPC frontier, validating the foundational premise of Mont-Blanc's research and serving as a comparable sovereign-HPC effort.
  • NVIDIA (DGX / HPC): Dominant incumbent in HPC through GPU-accelerated computing (DGX systems, Grace CPU) and CUDA ecosystem. NVIDIA's recent ARM-based Grace CPU directly competes with the ARM-HPC trajectory Mont-Blanc helped validate, and represents the larger commercial reality competing against European sovereign efforts.

Regional players

  • E4 Computer Engineering: Italian HPC systems integrator and ARM-based cluster provider. Like Mont-Blanc, E4 has built ARM-based HPC solutions and serves the European HPC market with similar low-power, energy-efficient cluster offerings.

Market position

Strengths4 records

Weaknesses4 records

Competitive moat5 records

Key risks6 records

Key highlights6 records

Customer concentration

Mont-Blanc social profiles

Digital presence

Mont-Blanc financial estimates

Financial estimate

Revenue estimate

Valuation estimate

Mont-Blanc leadership team

Management profile

Number of profiles

Mont-Blanc funding detail

Funding detail

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

Mont-Blanc M&A and investment

M&A and investment

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Mont-Blanc

What does Mont-Blanc do?

Mont-Blanc is a European research consortium that develops energy-efficient High-Performance Computing (HPC) solutions using low-power ARM-based mobile processors for Exascale computing. The consortium produces an ARM-based HPC processor platform, a complete ARMv8 software ecosystem, a low-power Network on Chip (NoC) IP, and a multi-scale performance simulation environment across four sequential project phases.

Is Mont-Blanc a public or private company?

Mont-Blanc is a private company. It is classified as unknown and is currently operating.

When was Mont-Blanc founded?

Mont-Blanc was founded in 2011. It employs 1 to 10 people.

Where is Mont-Blanc based?

Mont-Blanc is headquartered in Les Clayes-sous-bois, France, in the Europe region.

How does Mont-Blanc make money?

One revenue line is on record: research Project Funding.

Who are Mont-Blanc's main competitors?

Direct peers on record are Barcelona Supercomputing Center (BSC), Arm, SiPearl, European Processor Initiative (EPI) and Atos (Bull / Eviden). Kalray is listed as an emerging player. Broad incumbents are HPE (Cray), Fujitsu (Fugaku / A64FX) and NVIDIA (DGX / HPC). E4 Computer Engineering is listed as a regional player.

Does Mont-Blanc have an API?

No public API is recorded for Mont-Blanc.

What industry is Mont-Blanc in?

Mont-Blanc's product category is High-Performance Computing Research. Its primary akta.pro industry code is HDACABAH, High-Performance Computing (HPC) Cluster Nodes & Systems, with a secondary code of HDACAOAB, HPC Clusters & Scale-Out Compute (x86/ARM).

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