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Chips Joint Undertaking

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uuid0044ppq

Namestring
Chips Joint Undertaking
Legal namestring
Chips Joint Undertaking
Company typeenum
Private
Founded yearint
2021
Descriptiontext

Chips Joint Undertaking (Chips JU) is a European tripartite public-private partnership headquartered in Brussels that implements the European Chips Act's R&I funding mandate. Established in 2021 as the Key Digital Technologies (KDT) Joint Undertaking, it was renamed and expanded in September 2023 following the European Chips Act entry into force, with the EU contribution rising from €1.8 billion to €4.175 billion and a total programme budget of nearly €11 billion including national and private co-investments. Chips JU operates through two pillars: (1) the Chips for Europe Initiative, funding Pilot Lines (NanoIC at imec for sub-2nm SoC, FAMES at CEA-Leti for FD-SOI and embedded NVM, APECS at FMD for advanced packaging, PIXEurope for photonics, and Quantum Pilot Lines), a European Design Platform, a network of Chips Competence Centres, and skills development; and (2) Electronic Components and Systems Research & Innovation (ECS R&I), funding materials, equipment, and methods across AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics.

The organisation does not sell commercial products or services. Instead, it disburses public funding through competitive open calls published on the EU Funding & Tenders Portal, where eligible applicants — large industry players, SMEs, startups, research institutions, and academia — submit proposals that are evaluated by independent expert panels. Funding is delivered through grant agreements under Horizon Europe and the Digital Europe Programme, with co-financing from Participating States (EU Member States plus the UK, which joined in March 2024) and the three Private Members (AENEAS, EPoSS, INSIDE industry associations).

Chips JU is governed by a tripartite structure: the European Commission (represented by DG CNECT and DG RTD), the Participating States through the Public Authorities Board, and the Private Members Board. The executive leadership transitioned in late 2024 with Dr Stefan Finkbeiner appointed as Governing Board Chair, replacing Ralf Bornefeld. Chips JU complements its funding role with ecosystem-building activities including brokerage events, info days, technical workshops, and international collaborations with the Republic of Korea, Japan, India, Singapore, and Taiwan — explicitly addressing Europe's strategic autonomy in semiconductors and a projected shortage of ~65,000 skilled professionals by 2030.

Short descriptiontext

Chips JU is the European tripartite public-private partnership implementing the EU Chips Act, disbursing nearly €11 billion to fund semiconductor R&I across pilot lines, design platforms, competence centres, and skills development, serving industry, SMEs, research institutions, and EU Member States.

Operating statusenum
Operating
Ownership categoryenum
Headcount rangeband
51–100
akta.pro rankint
HeadquartersBrussels, Belgium
HQ citystring
Brussels
HQ countrystring
Belgium
HQ regionstring
Europe
Markets served

Serves global market

Offices1 record

Each record includes

City, Country, Type, Description, Source

Keyword5 values
semiconductor research funding, public-private partnership, chip pilot lines, European Chips Act, electronic components systems
Industry4 codes
1Foundry Platform & Design Enablement Services (PDK/DFM/Process Qualification)
CodeHDAHACAJPrimaryYes
2Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC)
CodeHDAHABACPrimaryNo
3Logic Foundries (Advanced Nodes)
CodeHDAHACAAPrimaryNo
4National Development Banks & State Development Finance Institutions (DFIs)
CodeBPADACACPrimaryNo
NAICS code4 codes
  • Scientific Research and Development Services5417
  • Semiconductor Machinery Manufacturing333242
  • Semiconductor and Related Device Manufacturing334413
  • Research and Development in Nanotechnology541713
SIC code2 codes
  • Semiconductors & Related Devices3674
  • Services-Commercial Physical & Biological Research8731
Product category
Semiconductor R&I Public Funding
GTM motion1 record

Each record includes

Type, Description, Source

Revenue model3 records
1EU Public Funding via Horizon Europe & Digital Europe Programme
TypeSubscription Recurring
Description

Chips JU receives EU budget contributions through Horizon Europe and the Digital Europe Programme. The EU contribution was increased from €1.8 billion to €4.175 billion, with a grand total budget of nearly €11 billion including private and public (national/regional) co-investments. The JU issues open calls for proposals across both programmes, with EU budgets ranging from €2M to €1.67B per call or initiative.

chips-ju.europa.eu
2Participating State National Contributions
TypeSubscription Recurring
Description

EU Member States and associated countries (Participating States) provide national/regional co-funding that is matched against EU contributions. For the FAMES pilot line, national contributions equal the Chips JU contribution, each at €415 million (total €830M). For most calls, national contributions follow co-financing rates defined in the Single Basic Act.

chips-ju.europa.eu
3Private Member Contributions
TypeSubscription Recurring
Description

The three Private Members — AENEAS, EPoSS, and INSIDE Industry Associations — contribute private industry co-investment as part of the tripartite public-private partnership. This constitutes in-kind contributions from industry stakeholders participating in funded projects.

chips-ju.europa.eu
Marketing channels10 records

Each record includes

Title, Type, Stage, Description, Source

Distribution channels4 records

Each record includes

Title, Type, Scope, Target buyer, Description, Source

Cost components5 values
Personnel, Operations, Technology or R&D, Infrastructure, Others
GTM typeB2B
B2B
Offering typeServices
Services
Brand1 of 2 records shown
1Chips for Europe Initiative
Description

Part of Chips JU programme supporting technological capacity building through Pilot Lines, Design Platform, Competence Centres, quantum actions and skills development

chips-ju.europa.eu
+1 more record
Core offering1 text field

Chips Joint Undertaking is a European tripartite public-private partnership that funds research and innovation in advanced nano-electronic chip technologies and systems across two pillars: (1) the Chips for Europe Initiative, which funds pilot lines, a European Design Platform, Chips Competence Centres, quantum actions, and skills development; and (2) Electronic Components and Systems Research and Innovation (ECS R&I), which funds development of materials, equipment, technologies, and methods for the EU semiconductor ecosystem. Funding is disbursed through open, competitive calls for proposals published on the Chips JU website and the EU Funding & Tenders Portal, with a total programme budget of nearly €11 billion drawn from EU, national, and private contributions.

Differentiator
Functional benefit
Problem solved
Quantifiable outcome1 of 7 values shown
  • Nearly €11 billion total programme budget mobilised for European semiconductor ecosystem
+6 more records
Product overview1 text field

Chips Joint Undertaking is a European tripartite public-private partnership implementing the Chips for Europe Initiative and continuing Electronic Components and Systems Research and Innovation (ECS R&I) activities. The organisation manages a portfolio of five pilot lines (NanoIC, FAMES, APECS, PIXEurope, and Quantum Pilot Lines), the EU Chips Design Platform, and a network of Chips Competence Centres. Funding is delivered through two programmes: Horizon Europe R&I calls addressing AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics; and Digital Europe Programme calls for AI compute infrastructure, skills development, and international collaboration. The total budget is nearly €11 billion from EU, national/regional, and private industry contributions.

Product and service12 records
1Chips for Europe Initiative
CategoryCore Funding Programme
2Electronic Components and Systems Research and Innovation (ECS R&I)
CategoryCore Funding Programme
3NanoIC Pilot Line
CategoryPilot Line Infrastructure
4FAMES Pilot Line
CategoryPilot Line Infrastructure
5APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)
CategoryPilot Line Infrastructure
6PIXEurope Pilot Line (Photonic Integrated Circuits)
CategoryPilot Line Infrastructure
7EU Chips Design Platform
CategoryDigital Infrastructure
8Chips Competence Centres Network
CategorySupport Infrastructure
9Quantum Pilot Lines
CategoryPilot Line Infrastructure
10Horizon JU Chips R&I Calls
CategoryFunding Programme
11AI Chip Demonstrators Call (DIGITAL-JU-CHIPS-2026-AI1-SG)
CategoryFunding Programme
12Skills-Related Calls (Skills Hubs of Excellence, Pilot Federation, Stimulation of Chip Design)
CategorySkills and Training Programme
Scale indicator20 records

Each record includes

Type, Value, Description, Source

Partnership15 partners
1Japan (Japanese Consortia)
Strategic tierFlagshipTypeStrategic or Co-development PartnerAnnounced on2026-07-07
Description

Chips JU launched a collaborative call with Japan on semiconductors (DIGITAL-JU-Chips-2026-SG-JAPAN), focusing on chiplet ecosystems for AI and advanced process technologies for nodes beyond 2nm. Expected EU contribution per project: €3-5M. This call is presented at the 2nd EU-Japan Digital Foundations Network Symposium (June 2026) and opens on 7 July 2026 with a deadline of 24 September 2026.

chips-ju.europa.eu
Strategic tierMajorTypeStrategic or Co-development PartnerAnnounced on2026-07-07
Description

Chips JU launched the ECS International Collaboration call (HORIZON-JU-Chips-2026-3-RIA) fostering low-TRL collaboration with India, Singapore, and Taiwan on chip design, manufacturing, and packaging. EU budget: €5M; expected EU contribution per project: €2-2.5M. No co-financing by Participating States under Article 141(2) SBA (100% Horizon Europe funding).

3Republic of Korea — Pilot Federation and Skills-related Calls
Strategic tierMajorTypeStrategic or Co-development PartnerAnnounced on2026-07-07
Description

Beyond the €6M joint projects, Chips JU and Korea are expanding collaboration through additional international calls including joint calls on semiconductor technologies launched in July 2026. The EU-Japan Digital Foundations Network and the broader Digital Partnership framework underpin these collaborations.

chips-ju.europa.eu
4APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2024-11-06
Description

APECS is the Chips JU pilot line on advanced packaging and heterogeneous integration for electronic components and systems. It strengthens innovation across the European value chain by providing an industry-oriented environment for advanced packaging as a key enabling technology for chiplet architectures and heterogeneous integration. Implemented by the Research Fab Microelectronics Germany (FMD).

chips-ju.europa.eu
5PIXEurope Pilot Line (Photonic Integrated Circuits)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2024-11-06
Description

PIXEurope is the Chips JU pilot line on advanced photonic integrated circuits, coordinated by ICFO (Institute of Photonic Sciences) and co-funded by Chips JU and participating Member States with support from regional authorities. It aims to accelerate the adoption of integrated photonic chips and strengthen Europe's technological sovereignty in photonics.

chips-ju.europa.eu
6Republic of Korea (National Research Foundation of Korea)
Strategic tierFlagshipTypeStrategic or Co-development PartnerAnnounced on2024-07-17
Description

Chips JU and the Republic of Korea's National Research Foundation (NRF) co-fund four joint semiconductor projects: ENERGIZE (brain-like circuits using 2D materials for energy-efficient AI), NEHIL (laser-based LIDAR with heterogeneous integration), HAETAE (photonic brain-like chips for adaptable AI), and ViTFOX (visual data processing AI using ferroelectric materials). Total investment: ~€6M from EU and ~€6M from NRF over 3 years. This collaboration follows the EU-ROK Digital Partnership announced in November 2022.

chips-ju.europa.eu
7FAMES Consortium (led by CEA-Leti)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2024-06-23
Description

The FAMES (FD-SOI, Memories, Sensors) Pilot Line is led by CEA-Leti (France) and brings together 11 consortium members: imec (Belgium), Fraunhofer (Germany), Tyndall (Ireland), VTT (Finland), CEZAMAT WUT (Poland), Université Catholique de Louvain (Belgium), Silicon Austria Lab (Austria), SiNANO Institute (France), Grenoble INP (France), and University of Granada (Spain). The pilot line receives €830 million (€415M from Chips JU, €415M from Participating States). It develops FD-SOI, embedded NVM, RF components, 3D integration, and power management IC technologies.

chips-ju.europa.eu
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2024-05-20
Description

NanoIC is the Chips JU pilot line focused on advanced sub-2nm leading-edge system-on-chip (SoC) technology, hosted by imec in Leuven, Belgium. As one of the four selected pilot lines, it supports European industries (automotive, telecommunications, health, etc.) in developing future-proof products leveraging the latest chip innovations. The pilot line is part of the €1.67 billion EU investment matched by national contributions.

9United Kingdom (as Participating State)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2024-03-12
Description

The United Kingdom joined Chips JU as a Participating State in March 2024, post-Brexit. This allows UK-based organisations to participate in Chips JU funded projects and co-invest in the European semiconductor ecosystem. The UK Technology Minister Saqib Bhatti confirmed the UK's commitment to semiconductor science and research through Chips JU membership.

chips-ju.europa.eu
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2023-09-21
Description

AENEAS is one of three Private Members in the Chips JU tripartite governance structure. As an industry association representing organisations in the European electronic components and systems ecosystem, AENEAS helps shape strategic R&I priorities and ensures alignment with industry needs. AENEAS co-organises the ECS Brokerage Event and other community-building activities with EPoSS and INSIDE.

Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2023-09-21
Description

EPoSS is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in smart systems integration and contributes to defining strategic research priorities in areas such as heterogeneous integration, edge AI, and autonomous systems. EPoSS co-organises the ECS Brokerage Event, Annual Forum, and other events with AENEAS and INSIDE.

Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2023-09-21
Description

INSIDE Industry Association is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in intelligent digital systems and contributes to Chips JU strategic priority setting. INSIDE co-organises community events including INSIDE Connect, thematic workshops, and the ECS Brokerage Event with AENEAS and EPoSS.

Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2023-09-21
Description

The European Commission, represented by DG CNECT and DG RTD, provides strategic guidance and public investment to Chips JU as the EU representative in the tripartite governance. The Commission defines the regulatory framework (European Chips Act, Single Basic Act), allocates EU budget through Horizon Europe and the Digital Europe Programme, and participates in programme governance through observer roles and policy oversight.

14Participating States (EU Member States + UK)
Strategic tierCoreTypeStrategic or Co-development PartnerAnnounced on2023-09-21
Description

EU Member States and the United Kingdom (as a Participating State since March 2024) provide national/regional co-funding for Chips JU calls and ensure alignment with national semiconductor priorities. They participate in the Public Authorities Board (PAB) and contribute to the governance and strategic direction of the Joint Undertaking. National mirror groups (e.g., Chips Mirror Group Italy) facilitate domestic participation.

chips-ju.europa.eu
Strategic tierMajorTypeStrategic or Co-development Partner
Description

Chips JU funds a network of Chips Competence Centres across Europe including AT-C³ (Austria), ChipNL CC (Netherlands), LCCC (Latvia), KIIP (Estonia), Chips C2-LT (Lithuania), and others. These centres provide technical expertise, experimentation, design support, and skills training to SMEs and startups, facilitating access to pilot lines and the European design platform. The Austrian AT-C³ offers up to 80% funding rates for SMEs.

Recent move7 records

Each record includes

Date, Type, Title, Description, Source

Expansion highlight6 records

Each record includes

Type, Description

Peers10 records
1CHIPS for America (NIST CHIPS Office)
TypeDirect peer
Description

US federal implementation body for the CHIPS and Science Act, deploying $52B+ in semiconductor R&D and manufacturing incentives. Direct functional peer to Chips JU as the Western world's other major semiconductor funding instrument, albeit with different governance and funding instruments.

TypeDirect peer
Description

South Korea's semiconductor and industrial technology funding agency, implementing Korea's K-Semiconductor Strategy. Direct functional peer to Chips JU as a national PPP-style funding body with active international collaboration including the EU-Korea joint calls.

TypeBroad incumbent
Description

World-leading independent semiconductor R&D center headquartered in Leuven, Belgium. Hosts the Chips JU NanoIC pilot line and operates broader R&D capabilities (sub-2nm, 3D, photonics) that overlap heavily with Chips JU's funded scope.

TypeBroad incumbent
Description

France's leading microelectronics RTO, based in Grenoble. Hosts the Chips JU FAMES pilot line (€830M) and operates broader semiconductor R&D and pilot capabilities that parallel Chips JU programme funding scope.

TypeOthers
Description

European Commission funding mechanism for deep-tech innovation, including semiconductor startups. Complementary rather than directly competing; shares the SME/startup ecosystem that Chips JU competence centres also serve, with some overlap in chip-design and quantum-chip applicants.

TypeDirect peer
Description

Taiwan's government-funded applied research institute with deep semiconductor and electronics R&D capability. Comparable as a publicly-funded R&D organization whose mandate spans the semiconductor value chain and supports national industry competitiveness.

TypeDirect peer
Description

Japan's national R&D funding agency for advanced technology including semiconductors. Functional peer to Chips JU in pooling public-private capital for industrial R&D, with comparable scale programmes under Japan's semiconductor strategy.

TypeOthers
Description

Sister EU tripartite public-private partnership under Horizon Europe. Structurally identical governance model (EU, Member States, Private Members), providing a benchmark for how EU JUs operate and a structural peer for PPP funding governance, though focused on hydrogen rather than semiconductors.

TypeDirect peer
Description

Singapore's public-sector R&D agency with semiconductor manufacturing and design capabilities. Peer as a publicly-funded R&D organization active in semiconductor ecosystem building and participating in Chips JU's international collaboration calls.

TypeBroad incumbent
Description

Germany's Research Fab Microelectronics Germany consortium of Fraunhofer institutes. Implements the Chips JU APECS pilot line on advanced packaging and heterogeneous integration, with broader semiconductor R&D capabilities that overlap with Chips JU programme scope.

Market position
Strengths5 records

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Weaknesses5 records

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Competitive moat5 records

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Key risks6 records

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Key highlights7 records

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Named customers5 records

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Segment5 records

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Title, Type, Primary, Description, Pain point addressed, Use case, Source

Ideal customer profile4 records

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Profile, Firmographic size, Sales motion, Sales cycle length, Buying structure, Purchase trigger, Buyer persona, Geography, Industry vertical, Primary use case, Description, Pain points, Evidence proof points, Target buyer

Technology focused
No
API detail
Has APIbool
No

Docs URL, Description

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Has app

Feature4 records

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Profiles5 records

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Round, Amount USD, Date, Pre money valuation, Total investors, Investors, News

Investors

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Name, Type, Date of entry, Rounds participated, Website

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

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Name, Acquisition type, Announced date, Completed date, Status, Website, News

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M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Chips Joint Undertaking

Semiconductor R&I Public Fundingchips-ju.europa.eu

Chips JU is the European tripartite public-private partnership implementing the EU Chips Act, disbursing nearly €11 billion to fund semiconductor R&I across pilot lines, design platforms, competence centres, and skills development, serving industry, SMEs, research institutions, and EU Member States.

What Chips Joint Undertaking does

Chips Joint Undertaking (Chips JU) is a European tripartite public-private partnership headquartered in Brussels that implements the European Chips Act's R&I funding mandate. Established in 2021 as the Key Digital Technologies (KDT) Joint Undertaking, it was renamed and expanded in September 2023 following the European Chips Act entry into force, with the EU contribution rising from €1.8 billion to €4.175 billion and a total programme budget of nearly €11 billion including national and private co-investments. Chips JU operates through two pillars: (1) the Chips for Europe Initiative, funding Pilot Lines (NanoIC at imec for sub-2nm SoC, FAMES at CEA-Leti for FD-SOI and embedded NVM, APECS at FMD for advanced packaging, PIXEurope for photonics, and Quantum Pilot Lines), a European Design Platform, a network of Chips Competence Centres, and skills development; and (2) Electronic Components and Systems Research & Innovation (ECS R&I), funding materials, equipment, and methods across AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics.

The organisation does not sell commercial products or services. Instead, it disburses public funding through competitive open calls published on the EU Funding & Tenders Portal, where eligible applicants — large industry players, SMEs, startups, research institutions, and academia — submit proposals that are evaluated by independent expert panels. Funding is delivered through grant agreements under Horizon Europe and the Digital Europe Programme, with co-financing from Participating States (EU Member States plus the UK, which joined in March 2024) and the three Private Members (AENEAS, EPoSS, INSIDE industry associations).

Chips JU is governed by a tripartite structure: the European Commission (represented by DG CNECT and DG RTD), the Participating States through the Public Authorities Board, and the Private Members Board. The executive leadership transitioned in late 2024 with Dr Stefan Finkbeiner appointed as Governing Board Chair, replacing Ralf Bornefeld. Chips JU complements its funding role with ecosystem-building activities including brokerage events, info days, technical workshops, and international collaborations with the Republic of Korea, Japan, India, Singapore, and Taiwan — explicitly addressing Europe's strategic autonomy in semiconductors and a projected shortage of ~65,000 skilled professionals by 2030.

Chips Joint Undertaking firmographics

Firmographics
Name
Chips Joint Undertaking
Legal name
Chips Joint Undertaking
Website
https://chips-ju.europa.eu
Company type
Private
Founded year
2021
Operating status
Operating
Headcount range
51–100 employees
Short description
Chips JU is the European tripartite public-private partnership implementing the EU Chips Act, disbursing nearly €11 billion to fund semiconductor R&I across pilot lines, design platforms, competence centres, and skills development, serving industry, SMEs, research institutions, and EU Member States.
Ownership category
akta.pro rank

Chips Joint Undertaking industry classification

Industry
Product category
Semiconductor R&I Public Funding
NAICS
Scientific Research and Development Services (5417), Semiconductor Machinery Manufacturing (333242), Semiconductor and Related Device Manufacturing (334413), Research and Development in Nanotechnology (541713)
SIC
Semiconductors & Related Devices (3674), Services-Commercial Physical & Biological Research (8731)
akta.pro primary industry
Foundry Platform & Design Enablement Services (PDK/DFM/Process Qualification) (HDAHACAJ)
akta.pro secondary industries
Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC) (HDAHABAC), Logic Foundries (Advanced Nodes) (HDAHACAA), National Development Banks & State Development Finance Institutions (DFIs) (BPADACAC)

Keywords

  • Semiconductor research funding
  • Public-private partnership
  • Chip pilot lines
  • European Chips Act
  • Electronic components systems

Where Chips Joint Undertaking is headquartered

Location

Headquarters

HQ city
Brussels
HQ country
Belgium
HQ region
Europe

Offices1 record

Markets served

Chips Joint Undertaking business model

Business model
GTM type
B2B
Offering type
Services
Cost components
Personnel, Operations, Technology or R&D, Infrastructure, Others

Revenue model

  1. EU Public Funding via Horizon Europe & Digital Europe Programme: Chips JU receives EU budget contributions through Horizon Europe and the Digital Europe Programme. The EU contribution was increased from €1.8 billion to €4.175 billion, with a grand total budget of nearly €11 billion including private and public (national/regional) co-investments. The JU issues open calls for proposals across both programmes, with EU budgets ranging from €2M to €1.67B per call or initiative.
  2. Participating State National Contributions: EU Member States and associated countries (Participating States) provide national/regional co-funding that is matched against EU contributions. For the FAMES pilot line, national contributions equal the Chips JU contribution, each at €415 million (total €830M). For most calls, national contributions follow co-financing rates defined in the Single Basic Act.
  3. Private Member Contributions: The three Private Members — AENEAS, EPoSS, and INSIDE Industry Associations — contribute private industry co-investment as part of the tripartite public-private partnership. This constitutes in-kind contributions from industry stakeholders participating in funded projects.

Go-to-market motion1 record

Distribution channels4 records

Marketing channels10 records

Chips Joint Undertaking product offering

Product offering

Core offering

Chips Joint Undertaking is a European tripartite public-private partnership that funds research and innovation in advanced nano-electronic chip technologies and systems across two pillars: (1) the Chips for Europe Initiative, which funds pilot lines, a European Design Platform, Chips Competence Centres, quantum actions, and skills development; and (2) Electronic Components and Systems Research and Innovation (ECS R&I), which funds development of materials, equipment, technologies, and methods for the EU semiconductor ecosystem. Funding is disbursed through open, competitive calls for proposals published on the Chips JU website and the EU Funding & Tenders Portal, with a total programme budget of nearly €11 billion drawn from EU, national, and private contributions.

Product overview

Chips Joint Undertaking is a European tripartite public-private partnership implementing the Chips for Europe Initiative and continuing Electronic Components and Systems Research and Innovation (ECS R&I) activities. The organisation manages a portfolio of five pilot lines (NanoIC, FAMES, APECS, PIXEurope, and Quantum Pilot Lines), the EU Chips Design Platform, and a network of Chips Competence Centres. Funding is delivered through two programmes: Horizon Europe R&I calls addressing AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics; and Digital Europe Programme calls for AI compute infrastructure, skills development, and international collaboration. The total budget is nearly €11 billion from EU, national/regional, and private industry contributions.

Differentiator

Problem solved

Functional benefit

Brands

  • Chips for Europe Initiative: Part of Chips JU programme supporting technological capacity building through Pilot Lines, Design Platform, Competence Centres, quantum actions and skills development
  • Electronic Components and Systems R&I

Products and services

  • Chips for Europe Initiative
  • Electronic Components and Systems Research and Innovation (ECS R&I)
  • NanoIC Pilot Line
  • FAMES Pilot Line
  • APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)
  • PIXEurope Pilot Line (Photonic Integrated Circuits)
  • EU Chips Design Platform
  • Chips Competence Centres Network
  • Quantum Pilot Lines
  • Horizon JU Chips R&I Calls
  • AI Chip Demonstrators Call (DIGITAL-JU-CHIPS-2026-AI1-SG)
  • Skills-Related Calls (Skills Hubs of Excellence, Pilot Federation, Stimulation of Chip Design)

Quantifiable outcome

  • Nearly €11 billion total programme budget mobilised for European semiconductor ecosystem
  • +6 more outcomes

Companies that use Chips Joint Undertaking

Customer profile

Named customers5 records

Segments5 records

Ideal customer profiles4 records

Chips Joint Undertaking technology and API

Technology

Technology focussed No

API detail

Has API
No
API docs
API detail

Core technology

AI maturity

App detail

Feature4 records

Chips Joint Undertaking partnerships and signals

Strategic signal

Partnerships

15 partnerships are on record, tiered flagship, major and core.

  • Japan (Japanese Consortia)flagshipStrategic or Co-development Partner · 7 July 2026Chips JU launched a collaborative call with Japan on semiconductors (DIGITAL-JU-Chips-2026-SG-JAPAN), focusing on chiplet ecosystems for AI and advanced process technologies for nodes beyond 2nm. Expected EU contribution per project: €3-5M. This call is presented at the 2nd EU-Japan Digital Foundations Network Symposium (June 2026) and opens on 7 July 2026 with a deadline of 24 September 2026.
  • Digital Partnership and TTC Countries (India, Singapore, Taiwan)majorStrategic or Co-development Partner · 7 July 2026Chips JU launched the ECS International Collaboration call (HORIZON-JU-Chips-2026-3-RIA) fostering low-TRL collaboration with India, Singapore, and Taiwan on chip design, manufacturing, and packaging. EU budget: €5M; expected EU contribution per project: €2-2.5M. No co-financing by Participating States under Article 141(2) SBA (100% Horizon Europe funding).
  • Republic of Korea — Pilot Federation and Skills-related CallsmajorStrategic or Co-development Partner · 7 July 2026Beyond the €6M joint projects, Chips JU and Korea are expanding collaboration through additional international calls including joint calls on semiconductor technologies launched in July 2026. The EU-Japan Digital Foundations Network and the broader Digital Partnership framework underpin these collaborations.
  • APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)coreStrategic or Co-development Partner · 6 November 2024APECS is the Chips JU pilot line on advanced packaging and heterogeneous integration for electronic components and systems. It strengthens innovation across the European value chain by providing an industry-oriented environment for advanced packaging as a key enabling technology for chiplet architectures and heterogeneous integration. Implemented by the Research Fab Microelectronics Germany (FMD).
  • PIXEurope Pilot Line (Photonic Integrated Circuits)coreStrategic or Co-development Partner · 6 November 2024PIXEurope is the Chips JU pilot line on advanced photonic integrated circuits, coordinated by ICFO (Institute of Photonic Sciences) and co-funded by Chips JU and participating Member States with support from regional authorities. It aims to accelerate the adoption of integrated photonic chips and strengthen Europe's technological sovereignty in photonics.
  • Republic of Korea (National Research Foundation of Korea)flagshipStrategic or Co-development Partner · 17 July 2024Chips JU and the Republic of Korea's National Research Foundation (NRF) co-fund four joint semiconductor projects: ENERGIZE (brain-like circuits using 2D materials for energy-efficient AI), NEHIL (laser-based LIDAR with heterogeneous integration), HAETAE (photonic brain-like chips for adaptable AI), and ViTFOX (visual data processing AI using ferroelectric materials). Total investment: ~€6M from EU and ~€6M from NRF over 3 years. This collaboration follows the EU-ROK Digital Partnership announced in November 2022.
  • FAMES Consortium (led by CEA-Leti)coreStrategic or Co-development Partner · 23 June 2024The FAMES (FD-SOI, Memories, Sensors) Pilot Line is led by CEA-Leti (France) and brings together 11 consortium members: imec (Belgium), Fraunhofer (Germany), Tyndall (Ireland), VTT (Finland), CEZAMAT WUT (Poland), Université Catholique de Louvain (Belgium), Silicon Austria Lab (Austria), SiNANO Institute (France), Grenoble INP (France), and University of Granada (Spain). The pilot line receives €830 million (€415M from Chips JU, €415M from Participating States). It develops FD-SOI, embedded NVM, RF components, 3D integration, and power management IC technologies.
  • NanoIC Pilot Line (hosted by imec)coreStrategic or Co-development Partner · 20 May 2024NanoIC is the Chips JU pilot line focused on advanced sub-2nm leading-edge system-on-chip (SoC) technology, hosted by imec in Leuven, Belgium. As one of the four selected pilot lines, it supports European industries (automotive, telecommunications, health, etc.) in developing future-proof products leveraging the latest chip innovations. The pilot line is part of the €1.67 billion EU investment matched by national contributions.
  • United Kingdom (as Participating State)coreStrategic or Co-development Partner · 12 March 2024The United Kingdom joined Chips JU as a Participating State in March 2024, post-Brexit. This allows UK-based organisations to participate in Chips JU funded projects and co-invest in the European semiconductor ecosystem. The UK Technology Minister Saqib Bhatti confirmed the UK's commitment to semiconductor science and research through Chips JU membership.
  • AENEAScoreStrategic or Co-development Partner · 21 September 2023AENEAS is one of three Private Members in the Chips JU tripartite governance structure. As an industry association representing organisations in the European electronic components and systems ecosystem, AENEAS helps shape strategic R&I priorities and ensures alignment with industry needs. AENEAS co-organises the ECS Brokerage Event and other community-building activities with EPoSS and INSIDE.
  • EPoSS (European Association on Smart Systems Integration)coreStrategic or Co-development Partner · 21 September 2023EPoSS is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in smart systems integration and contributes to defining strategic research priorities in areas such as heterogeneous integration, edge AI, and autonomous systems. EPoSS co-organises the ECS Brokerage Event, Annual Forum, and other events with AENEAS and INSIDE.
  • INSIDE Industry AssociationcoreStrategic or Co-development Partner · 21 September 2023INSIDE Industry Association is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in intelligent digital systems and contributes to Chips JU strategic priority setting. INSIDE co-organises community events including INSIDE Connect, thematic workshops, and the ECS Brokerage Event with AENEAS and EPoSS.
  • European CommissioncoreStrategic or Co-development Partner · 21 September 2023The European Commission, represented by DG CNECT and DG RTD, provides strategic guidance and public investment to Chips JU as the EU representative in the tripartite governance. The Commission defines the regulatory framework (European Chips Act, Single Basic Act), allocates EU budget through Horizon Europe and the Digital Europe Programme, and participates in programme governance through observer roles and policy oversight.
  • Participating States (EU Member States + UK)coreStrategic or Co-development Partner · 21 September 2023EU Member States and the United Kingdom (as a Participating State since March 2024) provide national/regional co-funding for Chips JU calls and ensure alignment with national semiconductor priorities. They participate in the Public Authorities Board (PAB) and contribute to the governance and strategic direction of the Joint Undertaking. National mirror groups (e.g., Chips Mirror Group Italy) facilitate domestic participation.
  • European Chips Competence Centre NetworkmajorStrategic or Co-development PartnerChips JU funds a network of Chips Competence Centres across Europe including AT-C³ (Austria), ChipNL CC (Netherlands), LCCC (Latvia), KIIP (Estonia), Chips C2-LT (Lithuania), and others. These centres provide technical expertise, experimentation, design support, and skills training to SMEs and startups, facilitating access to pilot lines and the European design platform. The Austrian AT-C³ offers up to 80% funding rates for SMEs.

Scale indicators20 records

Recent moves7 records

Expansion highlights6 records

Chips Joint Undertaking competitors and assessment

Company assessment

Direct peers

  • CHIPS for America (NIST CHIPS Office): US federal implementation body for the CHIPS and Science Act, deploying $52B+ in semiconductor R&D and manufacturing incentives. Direct functional peer to Chips JU as the Western world's other major semiconductor funding instrument, albeit with different governance and funding instruments.
  • KIAT (Korea Institute for the Advancement of Technology): South Korea's semiconductor and industrial technology funding agency, implementing Korea's K-Semiconductor Strategy. Direct functional peer to Chips JU as a national PPP-style funding body with active international collaboration including the EU-Korea joint calls.
  • ITRI (Industrial Technology Research Institute): Taiwan's government-funded applied research institute with deep semiconductor and electronics R&D capability. Comparable as a publicly-funded R&D organization whose mandate spans the semiconductor value chain and supports national industry competitiveness.
  • NEDO (New Energy and Industrial Technology Development Organization): Japan's national R&D funding agency for advanced technology including semiconductors. Functional peer to Chips JU in pooling public-private capital for industrial R&D, with comparable scale programmes under Japan's semiconductor strategy.
  • A*STAR (Agency for Science, Technology and Research): Singapore's public-sector R&D agency with semiconductor manufacturing and design capabilities. Peer as a publicly-funded R&D organization active in semiconductor ecosystem building and participating in Chips JU's international collaboration calls.

Broad incumbents

  • imec: World-leading independent semiconductor R&D center headquartered in Leuven, Belgium. Hosts the Chips JU NanoIC pilot line and operates broader R&D capabilities (sub-2nm, 3D, photonics) that overlap heavily with Chips JU's funded scope.
  • CEA-Leti: France's leading microelectronics RTO, based in Grenoble. Hosts the Chips JU FAMES pilot line (€830M) and operates broader semiconductor R&D and pilot capabilities that parallel Chips JU programme funding scope.
  • Fraunhofer Microelectronics (FMD): Germany's Research Fab Microelectronics Germany consortium of Fraunhofer institutes. Implements the Chips JU APECS pilot line on advanced packaging and heterogeneous integration, with broader semiconductor R&D capabilities that overlap with Chips JU programme scope.

Others

  • European Innovation Council (EIC): European Commission funding mechanism for deep-tech innovation, including semiconductor startups. Complementary rather than directly competing; shares the SME/startup ecosystem that Chips JU competence centres also serve, with some overlap in chip-design and quantum-chip applicants.
  • Clean Hydrogen Joint Undertaking: Sister EU tripartite public-private partnership under Horizon Europe. Structurally identical governance model (EU, Member States, Private Members), providing a benchmark for how EU JUs operate and a structural peer for PPP funding governance, though focused on hydrogen rather than semiconductors.

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Strengths5 records

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Competitive moat5 records

Key risks6 records

Key highlights7 records

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Chips Joint Undertaking social profiles

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Frequently asked questions about Chips Joint Undertaking

What does Chips Joint Undertaking do?

Chips Joint Undertaking is a European tripartite public-private partnership that funds research and innovation in advanced nano-electronic chip technologies and systems across two pillars: (1) the Chips for Europe Initiative, which funds pilot lines, a European Design Platform, Chips Competence Centres, quantum actions, and skills development; and (2) Electronic Components and Systems Research and Innovation (ECS R&I), which funds development of materials, equipment, technologies, and methods for the EU semiconductor ecosystem. Funding is disbursed through open, competitive calls for proposals published on the Chips JU website and the EU Funding & Tenders Portal, with a total programme budget of nearly €11 billion drawn from EU, national, and private contributions.

Is Chips Joint Undertaking a public or private company?

Chips Joint Undertaking is a private company. It is classified as state government owned and is currently operating.

When was Chips Joint Undertaking founded?

Chips Joint Undertaking was founded in 2021. It employs 51 to 100 people.

Where is Chips Joint Undertaking based?

Chips Joint Undertaking is headquartered in Brussels, Belgium, in the Europe region.

How does Chips Joint Undertaking make money?

Three revenue lines are on record. EU Public Funding via Horizon Europe & Digital Europe Programme is the primary driver. The others are participating State National Contributions and private Member Contributions.

Who are Chips Joint Undertaking's main competitors?

Direct peers on record are CHIPS for America (NIST CHIPS Office), KIAT (Korea Institute for the Advancement of Technology), ITRI (Industrial Technology Research Institute), NEDO (New Energy and Industrial Technology Development Organization) and A*STAR (Agency for Science, Technology and Research). Broad incumbents are imec, CEA-Leti and Fraunhofer Microelectronics (FMD). Others are European Innovation Council (EIC) and Clean Hydrogen Joint Undertaking.

Does Chips Joint Undertaking have an API?

No public API is recorded for Chips Joint Undertaking.

What industry is Chips Joint Undertaking in?

Chips Joint Undertaking's product category is Semiconductor R&I Public Funding. Its primary akta.pro industry code is HDAHACAJ, Foundry Platform & Design Enablement Services (PDK/DFM/Process Qualification), with a secondary code of HDAHABAC, Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC). Its NAICS code is 5417 and its SIC code is 3674.

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Live signals
DatacenterdynamicsEU Chips Joint Undertaking puts out two calls for AI hardware development projectsThe EU Chips Joint Undertaking launched two calls for AI hardware development projects, offering a combined €80 million budget. The funding targets AI chip designers, system developers, data centers, public infrastructure operators, and cloud providers.Innovation News NetworkChips JU opens €80m calls to advance European AI computeThe Chips Joint Undertaking opened €80m in EU funding for AI compute, with a €10m call for chip demonstrators and a €70m call for testing infrastructure. Applications are due 27 October 2026, and the programme spans 42 months across three stages, with a later A2 rack-development call planned.Quantum ZeitgeistEurope funds G+D in uPQComing project to shield IDs from quantum attacksThe Chips Joint Undertaking is funding Giesecke+Devrient's uPQComing project to integrate post-quantum cryptography into embedded secure elements in identity cards. The project adapts authentication methods and creates crypto-agile architectures for resource-constrained environments, with prototypes in a Java Card chip OS. It aims to establish foundations for quantum-safe identities and strengthen Europe's technological sovereignty.Photonics SpectraEurope Establishing Pilot Line for Neutral Atom Quantum ChipsQ-PLANET, a European pilot line for the industrialization of neutral atom quantum technologies, is launching with €50 million ($57 million) in funding, co-funded by the European Chips Joint Undertaking and coordinated by Pasqal. The project brings together 28 research and technology organizations from eleven EU Member States to establish industrial manufacturing processes and standardized tools for quantum computing, sensing, and communication components. Fraunhofer Heinrich Hertz Institut is specifically developing a pilot line for optoelectronic circuits using thin-film lithium niobate and silicon nitride platforms to control quantum chips.All-About-IndustriesInitiative CHASSIS for Chiplet Technology in the Automotive SectorThe CHASSIS initiative (Chiplet-based Hardware Architectures for Software-defined Vehicles), a three-year collaborative research program, aims to develop an open chiplet-based platform for software-defined vehicles in the automotive sector. Supported by the Chips Joint Undertaking with funding from France, Germany, the Netherlands, and the United Kingdom, the initiative brings together European mobility, semiconductor, and software companies alongside research institutions to advance chiplet standardization and industrialization. Chiplets offer a modular alternative to traditional single-chip approaches, distributing computing tasks across specialized chips that can be combined as needed to meet increasing software demands in vehicles.LayeronematerialsGenesis project to drive sustainable semiconductor manufacturing in EuropeThe GENESIS project, coordinated by CEA-Leti and involving 58 partners across the European semiconductor value chain, has launched to develop sustainable manufacturing processes for the chip industry. With a budget of nearly €55 million and co-funding from the Chips Joint Undertaking, the three-year initiative aims to deliver approximately 45 innovations focused on emission control, PFAS-free materials, waste reduction, and raw material reuse.GrantbiteSecure Funding: Open-Source EDA Tools for European Chip DesignThe Horizon Europe program, managed by the Chips Joint Undertaking, is driving the development of open-source Electronic Design Automation (EDA) tools to enhance Europe's semiconductor ecosystem. The initiative aims to foster innovation in digital and analogue chip design through collaborative research and accessible resources.Semiconductor DigestGENESIS Project Launches to Lead Europe’s Transition To Sustainable Semiconductor ManufacturingThe GENESIS project, coordinated by CEA-Leti and involving 58 partners across the European semiconductor value chain, has launched to develop sustainable manufacturing processes. Co-funded with nearly €55 million by the Chips Joint Undertaking, the three-year initiative aims to deliver approximately 45 innovations focused on emission control, PFAS-free materials, and waste minimization.EetimesAccelerating Europe’s Photonics Lab-to-Fab JourneyPhotonics21 and 110 European associations signed a joint declaration calling for increased investment to secure Europe's photonics supply chain against rising competition from China. The EU's Chips Joint Undertaking has announced €325 million in funding calls, with the first €180 million aimed at establishing a pilot line to bridge the gap between lab research and industrial production of photonic integrated circuits.The UK's technology trade associationDSIT announces huge boost for British semiconductor scientists and businesses through access to the EU’s ‘Chips Joint Undertaking’ and Horizon EuropeThe UK Department for Science, Innovation and Technology announced enhanced access for British semiconductor businesses to the EU’s Chips Joint Undertaking and Horizon Europe funding programs. The initiative is backed by an initial £5 million from DSIT delivered via Innovate UK, with an additional £30 million allocated for 2025–2027 to support UK participation in European research priorities.