What Codasip does

Codasip is a Munich-headquartered semiconductor intellectual property company founded in 2014 that designs and licenses customizable RISC-V processor cores alongside its proprietary Codasip Studio electronic design automation tool and CodAL architecture description language. Codasip Studio generates both hardware register-transfer level (RTL) and software development kits (SDKs) from a single CodAL processor description, enabling customers to customize cores for specific workloads. The company pioneered commercial implementation of CHERI (Capability Hardware Enhanced RISC Instructions), with the X730 being the first commercially licensable CHERI-RISC-V 64-bit application core, targeting memory-safety vulnerabilities that account for approximately 70% of Common Vulnerabilities and Exposures (CVEs).

Codasip generates revenue primarily through licensing of its RISC-V processor IP portfolio (embedded, application, automotive), the Codasip Studio EDA tool, and CHERI-enabled IP cores, supplemented by substantial European Union and national grant funding totaling approximately €380 million across awarded, follow-on, and consortium phases. The company targets regulated markets including automotive (with ISO 26262 ASIL-D and ISO/SAE 21434 TÜV SÜD certifications), defense and avionics, industrial IoT and critical national infrastructure, and high-performance computing (through the €240M EU DARE project). Its go-to-market is direct B2B enterprise sales with technical field engagement, supported by EU consortium participation that provides validation and reference accounts in government and defense procurement. Notable customers include Mobileye, Rambus, Lattice Semiconductor, Sigma Designs, EnSilica, and Trinamic, with sales coverage in Europe, the United States, and South Korea.

As of July 2025, Codasip's board initiated an expedited sale process following investor interest during a recent funding round, and in April 2026 the company announced a strategic pivot to focus on cyber-resilient semiconductor architectures, divesting its low-end RISC-V processor design business to a public US semiconductor company (with GlobalFoundries cited as the leading candidate buyer). Codasip is co-founder of both RISC-V International and the CHERI Alliance, and employs approximately 250 staff across design centers in Germany, Czechia, France, the United Kingdom, Greece, and Spain.

Name

Codasip

Legal name

Codasip

Website

https://codasip.com

Company type

Private

Founded year

2014

Operating status

Operating

Headcount range

101–250 employees

Short description

Codasip is a Munich-based semiconductor IP company that licenses customizable RISC-V processor cores, CHERI-based secure processors, and Codasip Studio design automation tools to automotive, defense, industrial, and HPC customers across Europe, the US, and South Korea.

Ownership category

akta.pro rank

Product category

Semiconductor IP (RISC-V Processor Design)

NAICS

Semiconductor and Other Electronic Component Manufacturing (33441), Computer Systems Design and Related Services (5415)

SIC

Electronic Components, Nec (3679)

akta.pro primary industry

Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security) (HDAHAFAF)

akta.pro secondary industries

EDA Software Platforms (Digital Implementation, Verification & Signoff) (HDAHAFAA), Embedded Software & Firmware Tools (Compilers, Debug, RTOS tooling) (HDAHAFAE), Design Services & ASIC/SoC Implementation (EDA-Adjacent) (HDAHAFAL), Silicon IP Subsystems & Chiplet IP (Die-to-Die, UCIe, NoC, I/O chiplets) (HDAHAFAH)

Keywords

• RISC-V processor IP
• Semiconductor IP licensing
• Processor design automation
• CHERI memory protection
• Automotive functional safety

Headquarters

HQ city

Munich

HQ country

Germany

HQ region

Europe

Offices13 records

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Marketing or Sales, Infrastructure

Revenue model

1. RISC-V Processor IP Licensing: Codasip licenses its portfolio of standard and customizable RISC-V processor cores (embedded, application, automotive) to semiconductor companies and system OEMs. Licensing includes baseline IP in standard RTL and customizable IP via architecture license with Codasip Studio.
2. Codasip Studio / EDA Tool Licensing: Codasip Studio is licensed to customers who wish to customize existing Codasip cores or design new processors. The tool generates both RTL and SDK from CodAL descriptions, enabling rapid processor development.
3. CHERI-Enabled Processor IP: Codasip licenses CHERI-enhanced RISC-V cores (X730, 700 family) and complementary software for security-focused applications in regulated markets. Codasip Prime platform bundles hardware (FPGA) and software development kits for CHERI evaluation.
4. EU Research & Development Grants: Codasip receives substantial EU and national government grant funding (totaling over €119M awarded, with follow-on phases totaling ~€210M more) through participation in consortium projects like DARE, TRISTAN, RIGOLETTO, ISOLDE, NimbleAI, and others. While not direct revenue, this funding supports R&D and is transferable to acquirers under reasonable terms.

Pricing tiers

Go-to-market motion2 records

Distribution channels1 record

Marketing channels7 records

Core offering

Codasip designs, develops, and licenses customizable RISC-V processor IP cores together with its proprietary Codasip Studio EDA tool, which automatically generates both RTL hardware and software development kits (SDKs) from a single CodAL architecture description. Its portfolio spans embedded, application, and ASIL-B/D certified automotive cores, including the first commercially licensable CHERI-enabled 64-bit RISC-V processor (X730) for memory-safe, cyber-resilient silicon targeting automotive, defense, IoT, and HPC/AI markets.

Differentiator

Problem solved

Functional benefit

Brands

• CodAL: Codasip's proprietary architecture description language used to describe both the ISA and microarchitecture of processors.
• Codasip Studio
• Codasip Prime

Products and services

• RISC-V Processor IP Portfolio
• Codasip Studio (EDA Tool)
• Codasip Prime (CHERI Exploration Platform)
• CHERI-Enabled Processor IP (X730 and 700 family)
• Automotive RISC-V Cores (L-series)

Quantifiable outcome

• ~70% of CVEs (Common Vulnerabilities and Exposures) can be prevented by CHERI's architectural memory protection
• +5 more outcomes

Named customers12 records

Segments5 records

Ideal customer profiles4 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

AI capability3 records

Feature6 records

Partnerships

Eight partnerships are on record, tiered notable, flagship, core and minor.

• EnSilicanotableOEM/ Whitelabel/ Licensing Partner · 19 November 2025Codasip entered a strategic licensing agreement with EnSilica (November 2025) for CHERI-enabled embedded CPU from the 700 family. EnSilica will integrate Codasip's CHERI processor IP into its semiconductor offerings for secure automotive and industrial applications.
• IAR SystemsnotableTechnology or Integration · 1 October 2025Codasip partnered with IAR (October 2025) to demonstrate ASIL-grade motor control innovation, combining Codasip's L-series RISC-V cores with IAR's certified embedded development toolschain for functional safety in automotive applications.
• Barcelona Supercomputing Center (DARE Project)flagshipStrategic or Co-development Partner · 1 March 2025Codasip is a key partner in the DARE project (€240M, coordinated by Barcelona Supercomputing Center), designing a high-end RISC-V processor for European HPC and AI. The project involves 38 organizations including Openchip, Software Technologies, and Axelera AI, aiming to reduce Europe's dependence on US-based chip manufacturers.
• CHERI AlliancecoreStrategic or Co-development Partner · 1 November 2024Codasip co-founded the CHERI Alliance (November 2024), a community interest organization promoting global adoption of CHERI security technology. Founding members include University of Cambridge, Google, UK NCSC, and UK Dstl. Codasip donated its CHERI RISC-V SDK to the Alliance for unrestricted use.
• TRISTAN ConsortiumcoreStrategic or Co-development Partner · 1 October 2024Codasip participates in the TRISTAN project (EU Horizon Europe, grant agreement 101095947), a multi-partner RISC-V technology and applications consortium. The collaboration provided requirements for Codasip's Exploration Framework tool.
• Cerberus Security Labs (Acquired)coreOthers · 1 November 2022Codasip acquired Cerberus Security Labs (UK) in November 2022. Cerberus specialized in designing and building secure IoT products, bringing security IP expertise that deepened Codasip's embedded security capabilities.
• CHIPSAllianceminorStrategic or Co-development Partner · 1 January 2020Codasip joined CHIPSAlliance in 2020, contributing to open-source hardware development for semiconductor IP and engaging with the broader open hardware ecosystem.
• RISC-V International (formerly RISC-V Foundation)coreStrategic or Co-development Partner · 1 January 2017Codasip co-founded RISC-V International in 2017, making it one of the founding members of the organization that governs the RISC-V open instruction set architecture. Codasip actively contributes to RISC-V working groups and standards development.

Scale indicators9 records

Recent moves8 records

Expansion highlights6 records

Emerging players

• Rivos: Rivos is a RISC-V startup developing server-class application processors for AI and data center workloads, overlapping with Codasip's high-end DARE-project roadmap. Both target RISC-V's expansion into HPC.
• Esperanto Technologies: Esperanto builds RISC-V-based AI accelerators and high-core-count processors for inference, intersecting with Codasip's edge-AI vector processor and HPC roadmap. Both sell RISC-V into AI/ML workloads.

Direct peers

• SiFive: SiFive is the leading commercial developer of RISC-V processor IP, offering application and embedded cores that compete head-to-head with Codasip's L- and X-series. Both target automotive, AI and embedded customers, and both market customization toolchains alongside their IP.
• Ventana Micro Systems: Ventana develops high-performance RISC-V application cores (Veyron V1/V2) targeting data center, automotive and client compute. It overlaps with Codasip's high-end application core roadmap and CHERI/security positioned roadmap.
• Andes Technology: Andes is a long-established commercial RISC-V processor IP vendor (AndeStar/A-series) covering embedded, automotive and AI edge use cases. Andes and Codasip directly compete for similar RISC-V licensing opportunities in Asia and globally.
• MIPS Tech: MIPS licenses the MIPS instruction set and processor IP for embedded, automotive and edge AI. MIPS and Codasip overlap in offering licensable processor cores to fabless semiconductor and OEM customers, including in automotive.

Broad incumbents

• Cadence (Tensilica and EDA): Cadence's Tensilica DSP/AI IP and EDA stack compete with Codasip's customizable cores and Studio tool, particularly in audio, DSP and AI-accelerator applications. Cadence is a broad incumbent overlapping on both IP and tooling.
• Imagination Technologies: Imagination licenses GPU and CPU (MIPS) IP into automotive, IoT and consumer markets that overlap with Codasip's segments. Imagination Technologies is also the prior employer of CEO Ron Black, signaling overlapping customer relationships.
• Arm: Arm is the dominant supplier of licensable processor IP (Cortex-A/R/M, Mali) to the same automotive, IoT and embedded customers that Codasip targets with its RISC-V cores. Arm is the primary incumbent alternative whose ecosystem lock-in Codasip positions itself against.
• Synopsys (ARC and EDA): Synopsys offers ARC processor IP alongside its dominant EDA suite, competing with both Codasip's processor cores and Codasip Studio-style automation. Synopsys is also a broad incumbent selling toolchains into the same semiconductor customers.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat5 records

Key risks6 records

Key highlights7 records

Customer concentration

• LinkedInlinkedin.com/company/codasip
• YouTubeyoutube.com/c/Codasip
• Xx.com/Codasip

Revenue estimate

Valuation estimate

Number of profiles

Profiles15 records

Subsidiaries1 record

Funding overview

Funding rounds7 records

Investors9 records

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A1 record

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Codasip