What M31 Technology does

M31 Technology Corporation is an independent semiconductor silicon intellectual property (IP) provider founded in 2011 and headquartered in Zhubei City (Hsinchu County), Taiwan, with US operations in Milpitas, California, and an R&D center in Bangalore, India. The company specializes in two complementary IP categories — Foundation IP (standard cell libraries, memory compilers, GPIO, PLL, ADC/temperature sensors) and Interface IP (USB, PCIe, MIPI, SerDes, LPDDR, DisplayPort, UFS/UniPro controllers) — covering process nodes from 2nm to 180nm across 15 wafer foundries, with 400+ Foundation IPs and 280+ Interface IPs all silicon-proven through tapeout and mass production validation. Key certifications include ISO 26262 functional safety at ASIL-D (Memory Compiler, GPIO) and ASIL-B (MIPI M-PHY, MIPI D-PHY, PCIe PHY), enabling the automotive segment alongside AI, mobile/5G, HPC/data center, storage, and IoT applications.

The company generates revenue primarily through one-time IP licensing fees charged to fabless semiconductor companies, IDMs, and foundries, supplemented by per-unit royalties on customer chips that enter mass production. In 2025, total revenue reached NT$1.78 billion (approximately US$56M), a 20.3% year-over-year record, with advanced-process (below 16nm) licensing authorization growing over 250%. Customer relationships include TSMC (IP Alliance member since 2012), Samsung Foundry, Intel Foundry Services, Arm, Qualcomm, MediaTek, NXP, GlobalFoundries, Cadence, Siemens, and InnoGrit. M31 listed on the Taiwan Stock Exchange in January 2024 under ticker 6643-TW; Q4 2025 marked the initial recognition of 3nm royalties, with management projecting royalty revenue to scale to ~20% of total revenue in 2026.

Distribution is enterprise-direct: dedicated sales teams and foundry IP catalogs (TSMC IP Alliance, Samsung SAFE, IFS Accelerator) reach global fabless customers in Taiwan, China, and North America — three major regional markets with balanced revenue contribution. Recent strategic moves include chiplet ecosystem participation with Cadence and Samsung (January 2026), eUSB2V2 tapeout on TSMC N2P 2nm (April 2026), and MIPI M-PHY v5.0 silicon validation on 4nm advancing toward 3nm for UFS 4.1 applications (February 2026).

Name

M31 Technology

Legal name

M31 Technology Corporation

Website

https://m31tech.com

Company type

Public

Founded year

2011

Operating status

Operating

Headcount range

101–250 employees

Short description

M31 Technology is an independent semiconductor silicon IP provider offering 400+ Foundation and 280+ Interface IPs (USB, PCIe, MIPI, DDR, SerDes) for advanced processes from 2nm to 180nm, serving fabless chip designers and foundries across automotive, AI, mobile, HPC, and storage applications.

Ownership category

akta.pro rank

Product category

Semiconductor Silicon IP

NAICS

Semiconductor and Related Device Manufacturing (334413), Semiconductor and Other Electronic Component Manufacturing (33441)

SIC

Semiconductors & Related Devices (3674)

akta.pro primary industry

Hardware/Chip Design IP Cores (Processor, Interface, Analog, Security) (HDAHAFAF)

akta.pro secondary industries

Silicon IP Subsystems & Chiplet IP (Die-to-Die, UCIe, NoC, I/O chiplets) (HDAHAFAH), IP Enablement, Characterization & Porting Services (HDAHAFAI)

Keywords

• Semiconductor silicon IP
• Foundation IP design
• Interface IP licensing
• Chip design IP blocks
• Automotive IP solutions

Headquarters

HQ city

Hsinchu

HQ country

Taiwan

HQ region

Asia

Offices3 records

Markets served

GTM type

B2B

Offering type

Software

Cost components

Technology or R&D, Personnel, Operations, Marketing or Sales, Infrastructure

Revenue model

1. IP Licensing Revenue: One-time licensing fees charged to customers for the right to use M31's silicon IP in their chip designs. Customers pay upfront for design enablement and integration support. Licensing revenue is recognized as customers engage M31 for new project designs. In 2025, new licensing authorization amounts from foundry customers increased over 200% year-over-year, with advanced process (below 16nm) licensing growing over 250%.
2. Royalty Revenue: Recurring royalties earned when customers' chips incorporating M31's IP enter mass production. Royalties are typically a per-unit or percentage-based fee on shipped chips. As advanced process customers (below 16nm) gradually enter commercialization, royalty revenue is entering an accelerating growth phase. In Q4 2025, M31 began recognizing initial 3nm royalties. The company projects royalty revenue to grow to 20% of total revenue in 2026.

Pricing tiers

Go-to-market motion1 record

Distribution channels2 records

Marketing channels6 records

Core offering

M31 Technology designs, develops and licenses silicon intellectual property (IP) for use in semiconductor chip designs, delivered as pre-verified, silicon-proven IP blocks. The portfolio spans Foundation IP (Standard Cell Library, Memory Compiler, General-Purpose/High ESD/SDIO & eMMC I/O, and Analog IP including Digital-PLL, Analog-PLL, and ADC/Temperature Sensor) covering 3nm to 180nm process nodes, and Interface IP (USB4 Gen3x2, USB 3.2/2.0/eUSB2, PCIe 5.0/4.0/3.1/2.1, MIPI C-PHY/D-PHY/M-PHY, SerDes, LPDDR4/4X, ONFI, DisplayPort TX/RX, and UFS/UniPro Controllers) covering 2nm to 110nm process nodes. Customers are fabless semiconductor companies, IDMs and foundries integrating M31 IP into SoCs for AI, automotive, HPC, mobile, storage and IoT applications.

Product overview

M31 Technology is a silicon intellectual property (IP) boutique offering a comprehensive portfolio of Foundation IP and Interface IP solutions for semiconductor chip design. The Foundation IP Voyager platform provides Standard Cell Libraries (including Base, PMK, LPKT, HPKT), Memory Compiler, General-Purpose I/O, High ESD I/O, SDIO & eMMC I/O, and Analog IP (Digital-PLL, Analog-PLL, ADC/Temp. Sensor) spanning process nodes from 3nm to 180nm. The Interface IP Voyager platform delivers high-speed connectivity solutions including USB (USB4 Gen3x2, USB 3.2, USB 2.0, eUSB2, USB_BCK), PCIe (5.0, 4.0, 3.1/2.1), MIPI (C-PHY/D-PHY Combo, D-PHY RX/TX, M-PHY), SerDes, DDR (LPDDR4/4X, ONFI), DisplayPort (TX, RX), and UFS/UniPro Controllers spanning process nodes from 2nm to 110nm. Additionally, M31 offers IP Integration Services combining PHY and Controller solutions (USB, MIPI, PCIe) to optimize SoC data transfer capabilities and minimize time-to-market.

Differentiator

Problem solved

Functional benefit

Products and services

• Foundation IP Voyager Platform bundling M31's Foundation IP solutions—Standard Cell Library family, Memory Compiler, I/O, and Analog IP—into a single offering for chip designers targeting process nodes from 3nm to 180nm.
• Interface IP Voyager Platform bundling M31's high-speed interface IP solutions—USB, PCIe, MIPI, SerDes, DDR, DisplayPort, and UFS/UniPro controllers—into a single offering for SoC designers targeting process nodes from 2nm to 110nm.
• Standard Cell Library Standard cell library IP providing basic circuit design elements (cells) optimized for performance, power and area parameters, licensed to chip designers across process nodes from 3nm to 180nm.
• Standard Cell Library (Base) Base standard cell library IP providing foundational cells for semiconductor design implementations, intended as a baseline for further optimization via PMK, LPKT or HPKT kits.
• Power Manage Kit (PMK) Power management optimization kit for standard cell library implementations, helping reduce power consumption in chip designs.
• Low Power Optimization Kit (LPKT) Low-power optimization kit that minimizes power consumption in chip designs through specialized low-power cells and techniques layered on top of M31's standard cell libraries.
• High Performance Kit (HPKT) High-performance optimization kit that maximizes speed in standard cell library implementations for high-speed SoC applications.
• Engineering Change Order (ECO) Engineering Change Order (ECO) service for efficient late-stage design modifications during the chip design lifecycle, applied to M31 standard cell library implementations.
• Memory Compiler Memory compiler IP for SRAM and other memory implementations, optimized for high density, low power and high performance; certified ISO 26262 ASIL-D Ready by SGS-TÜV for automotive safety applications.
• General-Purpose I/O General-purpose input/output (GPIO) library providing standard I/O cells for chip designs across supported process nodes.
• High ESD I/O Specialty I/O library with enhanced electrostatic discharge (ESD) protection for applications requiring robust ESD handling.
• SDIO & eMMC I/O I/O IP supporting SDIO and eMMC interfaces for secure digital and embedded multimedia card connectivity in SoC designs.
• Digital-PLL Digital phase-locked loop (PLL) IP using core-power-only design with programmable integer mode and fractional-N mode for low jitter frequency synthesis.
• Analog-PLL Analog phase-locked loop (PLL) IP for frequency synthesis and clock generation in semiconductor designs.
• ADC / Temperature Sensor Analog-to-digital converter (ADC) and temperature sensor IP for signal processing and thermal monitoring in chip designs.
• USB4 Gen3x2 PHY USB4 Gen3x2 transceiver PHY IP for complete USB4 host and peripheral applications up to 40 Gbps with full Type-C connector support and protocol tunneling of USB 3.2, DisplayPort and PCIe.
• USB 3.2 Gen2/Gen1 PHY USB 3.2 physical layer (PHY) IP supporting Gen2 (10 Gbps) and Gen1 (5 Gbps) data rates for high-speed USB connectivity in SoC designs.
• USB 2.0/1.1 PHY USB 2.0 and USB 1.1 physical layer (PHY) IP for legacy USB compatibility at speeds up to 480 Mbps.
• eUSB2 PHY Embedded USB 2.0 (eUSB2) physical layer (PHY) IP optimized for die-to-die and intra-board connections with lower voltage operation and improved signal integrity. eUSB2V2 variant supports up to 4.8 Gbps and 50 mW power on TSMC N2P.
• USB_BCK USB block control IP for managing USB interface operations and power states in USB-capable SoC designs.
• PCIe 5.0 PHY PCI Express 5.0 physical layer (PHY) IP providing high-performance, multi-lane capability and low-power architecture for high-bandwidth applications up to 32 Gbps per lane.
• PCIe 4.0 PHY PCI Express 4.0 physical layer (PHY) IP supporting data rates up to 16 Gbps for storage, networking and high-performance computing SoC applications.
• PCIe 3.1/2.1 PHY PCI Express 3.1 and 2.1 physical layer (PHY) IP supporting backward-compatible high-speed connectivity at 8 Gbps and 5 Gbps respectively.
• MIPI C-PHY/D-PHY Combo Combined MIPI C-PHY and D-PHY physical layer IP supporting both serial interface technologies widely adopted in smartphones, high-end sensors and multimedia-enabled embedded devices.
• MIPI D-PHY RX/TX v1.2/v1.1 MIPI D-PHY receiver and transmitter IP supporting v1.2 and v1.1 specifications for camera and display interfaces in mobile and embedded SoCs. ISO 26262 ASIL-B Ready certified.
• MIPI M-PHY v5.0/v4.1/v3.1 MIPI M-PHY physical layer IP supporting v5.0 (up to 23.32 Gbps per lane in HS-G5), v4.1 and v3.1 specifications for high-speed mobile interfaces enabling UFS 3.1/4.1 storage and other mobile/storage applications. ISO 26262 ASIL-B Ready certified.
• SerDes 10G/5G Serializer/Deserializer (SerDes) IP supporting 10 Gbps and 5 Gbps data rates for high-bandwidth point-to-point communications in SoC designs.
• LPDDR4/4X Low-Power DDR4 and LPDDR4X memory interface PHY IP supporting speeds up to 4267 Mbps for mobile and IoT SoC applications.
• ONFI I/O Open NAND Flash Interface (ONFI) I/O IP following ONFI specifications for high-speed NAND flash memory connectivity in storage controller SoCs.
• ONFI PHY Open NAND Flash Interface (ONFI) physical layer (PHY) IP supporting high-speed NAND flash connectivity for SSD and storage controller SoCs.
• DisplayPort TX DisplayPort transmitter (TX) IP for video output connectivity in consumer electronics, computing and embedded display SoCs.
• DisplayPort RX DisplayPort receiver (RX) IP for video input connectivity supporting multiple display configurations in consumer electronics and computing SoCs.
• UFS Host Controller 4.1 Universal Flash Storage (UFS) Host Controller 4.1 IP supporting the latest UFS 4.1 specification for high-speed mobile storage interfaces, including JEDEC-compliant UFSHCI v4.1 controller IP and UniPro control layer. ISO 26262 functional safety certified for automotive.
• UFS Host Controller 3.0 Universal Flash Storage (UFS) Host Controller 3.0 IP for legacy UFS storage interface support in mobile and embedded SoCs.
• UniPro Controller 2.0 UniPro protocol controller v2.0 IP supporting both host and device modes for UFS protocol stack implementation in storage SoCs.
• UniPro Controller 1.8 UniPro protocol controller v1.8 IP supporting both host and device modes for earlier UFS implementations.
• UniPro 1.6 Host UniPro protocol controller v1.6 IP for host-mode-only implementations in legacy UFS applications.
• USB PHY and Controller Integration Integrated USB PHY and Controller solution combining M31's USB physical layer and protocol controller for complete USB interface implementation, including design kits with behavioral models, controllers, integration simulation environments, constraint files and EDA sign-off data.
• MIPI C/D PHY and Controller Integration Integrated MIPI C-PHY/D-PHY and Controller solution for camera and display serial interface implementations, bundled with design kits, behavioral models, integration simulation environments and EDA sign-off data.
• PCIe PHY and Controller Integration Integrated PCIe PHY and Controller solution combining M31's PCIe physical layer and protocol stack for complete PCI Express implementation, including design kits, behavioral models, integration simulation environments and EDA sign-off data.
• TSMC 22nm Physical IP Platform Comprehensive physical IP platform on TSMC 22nm process (including 22ULP ultra-low power and 22ULL ultra-low leakage variants) covering Foundation IP, Memory IP, High-Speed Interface IP and Analog IP solutions.

Quantifiable outcome

• eUSB2V2 on N2P achieves 4.8 Gbps data transfer with target power consumption of 50 mW
• +3 more outcomes

Named customers11 records

Segments6 records

Ideal customer profiles2 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature6 records

Partnerships

Ten partnerships are on record, tiered core and strategic.

• Cadence Design SystemscoreTechnology or Integration · 6 January 2026M31 participates as an IP partner in Cadence's Chiplet Spec-to-Packaged Parts ecosystem, a strategic initiative to reduce chiplet design complexity and accelerate time-to-market. The ecosystem combines Cadence's Physical AI chiplet platform with pre-integrated partner IP. M31's IP is part of the pre-validated chiplet solutions, and Cadence collaborates with Samsung Foundry on silicon prototype demonstrations using M31's IP.
• Samsung FoundrycoreTechnology or Integration · 6 January 2026Samsung Foundry collaborates with Cadence and M31 in the chiplet ecosystem, building silicon prototype demonstrations on Samsung's SF5A process. M31's IP including UCIe 32G and LPDDR5X has been fully silicon validated on Samsung processes.
• ArmcoreTechnology or IntegrationArm is a key technology partner and customer for M31. Representatives attended the Bangalore R&D center opening. Collaboration on Arm-based designs and Arm Zena Compute Subsystem for next-generation edge AI processing in automotive, robotics, and drones.
• TSMCcoreTechnology or IntegrationM31 has been a member of TSMC IP Alliance since 2012. Deep collaboration on advanced-node IP development including platform design methodologies, circuit tuning, and reference flows. TSMC validates M31 IP on advanced nodes (N2P, 3nm, etc.). M31 has won TSMC OIP Partner of the Year Award for Specialty Process IP multiple times.
• Intel Foundry ServicesstrategicTechnology or IntegrationM31 partnered with Intel Foundry Services through the IFS Accelerator IP Alliance to present latest IP development achievements. Collaboration to enhance leading-edge IP solutions for SoC designs on Intel processes.
• InnoGritstrategicTechnology or IntegrationInnoGrit, a leading SSD storage chipmaker, adopted M31's PCIe 4.0/3.0 and ONFI 4.1 I/O IP cores for AI storage chips. M31's PCIe 5.0 IP was adopted for InnoGrit's next-generation SSD storage chips and has been successfully mass-produced.
• QualcommcoreTechnology or IntegrationKey customer and partner represented at M31's Bangalore R&D center opening ceremony. Collaboration on advanced process IP for mobile and AI applications.
• MediaTekcoreTechnology or IntegrationKey customer and partner represented at M31's Bangalore R&D center opening ceremony. Long-standing collaboration on mobile and communications chip IP.
• NXP SemiconductorsstrategicTechnology or IntegrationAutomotive semiconductor leader and key customer represented at M31's Bangalore R&D center opening. Collaboration on automotive IP solutions including ISO 26262 certified products.
• GlobalFoundriesstrategicTechnology or IntegrationFoundry partner represented at M31's Bangalore R&D center opening. Collaboration on specialty process IP development.

Scale indicators14 records

Recent moves9 records

Expansion highlights4 records

Direct peers

• Alphawave IP: UK-headquartered pure-play high-speed connectivity IP specialist focused on PCIe, SerDes, UCIe, HBM, and Ethernet PHY/controller IP for advanced nodes. Direct overlap with M31's Interface IP Voyager — both target advanced-node, AI/HPC, and data center customers with high-bandwidth SerDes IP.
• Rambus: US-listed IP and chip company focused on high-speed interface IP (DDR memory interface, PCIe, HBM, SerDes) and security IP. Directly comparable product overlap in interface IP, similar licensing-plus-royalty business model, and comparable end-customer base in HPC, AI, and data center.
• VeriSilicon: China-based fabless semiconductor IP and chip design platform company offering GPU, VPU, NPU, and interface IP plus ASIC services. Directly comparable as an IP licensor serving fabless customers across advanced nodes, with overlapping customer base in China.
• Faraday Technology: Taiwan-listed ASIC and IP provider offering silicon IP, design services, and IP licensing across TSMC, UMC, and SMIC processes. Overlaps with M31 in foundation and interface IP while also providing design services, targeting similar fabless customers in Asia.
• eMemory Technology: Taiwan-listed pure-play silicon IP vendor specializing in non-volatile memory (NVM) IP and security IP. Closest comparable in geography, size, listing status, and business model — both are boutique Taiwan-headquartered IP providers selling into the same foundry-validated chip design ecosystem.
• Imagination Technologies: UK-headquartered IP vendor offering GPU, CPU, and AI accelerator IP plus connectivity IP. Comparable as a pure-play IP licensing business model targeting mobile, automotive, and AI edge applications — overlapping with M31 on automotive and AI customer segments.

Broad incumbents

• Synopsys: Largest EDA and semiconductor IP vendor globally with a broad DesignWare IP portfolio covering interface, foundation, processor, and analog IP across all leading nodes. Overlaps directly with M31's interface IP category but competes from a much larger scale and broader portfolio.
• Cadence Design Systems: EDA leader with a growing IP portfolio (interface, memory, Tensilica processors) and a strategic partner of M31 through the Cadence Chiplet Spec-to-Packaged Parts ecosystem. Competes in interface IP but operates across EDA tools, IP, and system design at vastly larger scale.
• Arm Holdings: Dominant processor IP vendor whose Arm-based designs interoperate with M31's interface IP and is referenced as an R&D collaborator. Indirect competitor in IP licensing and direct partner — represents both opportunity (Arm subsystem co-design) and competitive threat in adjacent IP categories.

Emerging players

• Mobiveil: US-based fabless IP company specializing in high-speed interconnect, memory, and storage controller IP (PCIe, DDR, NAND, eMMC, UFS). Comparable product overlap in storage and interface IP at smaller scale than M31.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat6 records

Key risks6 records

Key highlights7 records

Customer concentration

• Xx.com/m31_technology
• LinkedInlinkedin.com/company/m31-technology

Compliance4 records

Revenue estimate

Valuation estimate

Number of profiles

Profiles8 records

Subsidiaries1 record

Funding overview

Funding rounds1 record

Investors1 record

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about M31 Technology