What Syosil does

SyoSil ApS is a privately held Danish semiconductor engineering consultancy headquartered in Taastrup, near Copenhagen. Founded in February 2003 by Peter Jensen and Jacob Sander Andersen, both former MIPS Technologies engineers, the company specializes in System-on-Chip and ASIC/FPGA design and verification services centered on the SystemVerilog and Universal Verification Methodology (UVM) standards. Its core offering consists of hand-picked engineering teams that work onsite at client sites or offsite from SyoSil offices, scaling from two to ten-plus engineers based on project phase, with engagements spanning short-term methodology training, methodology migration (e.g., VHDL to SystemVerilog/UVM), and full project outsourcing through verification sign-off.

SyoSil's technology stack combines industry-leading EDA tools from Synopsys and Cadence with proprietary internal assets including the SyoGen model-driven code generation framework for UVM UVCs and an open-source UVM Scoreboard released under the Apache license. The team contributes to the verification community through DVCon technical papers on UVM scoreboarding, SystemVerilog Assertions, and portable stimulus. Revenues are generated primarily through professional services engagements with top-tier European and U.S. semiconductor companies across the automotive, video surveillance, telecommunications, and 3D video application domains, supported by ancillary SystemVerilog/UVM training programs. Notable multi-generational client relationships include a five-generation ASIC verification engagement for a global video surveillance provider spanning ten years.

The firm's go-to-market is enterprise field sales, with services delivered through direct consulting engagement, technical publications, conference presence, and open-source community credibility. Headcount stands at approximately 20 full-time engineers, with active recruitment and a planned move to larger facilities indicating capacity expansion. SyoSil is privately held by its founders with no disclosed external institutional investment.

Name

Syosil

Legal name

SyoSil ApS

Website

https://syosil.com

Company type

Private

Founded year

2003

Operating status

Operating

Headcount range

11–50 employees

Short description

SyoSil ApS is a Danish ASIC/FPGA design and verification consultancy serving top-tier European and U.S. semiconductor companies with SystemVerilog/UVM-focused engineering teams, working onsite or offsite across automotive, surveillance, telecom, and 3D video domains.

Ownership category

akta.pro rank

Product category

Semiconductor Design and Verification Services

NAICS

Custom Computer Programming Services (541511), Computer Systems Design Services (541512), Computer Training (611420)

SIC

Services-Computer Programming Services (7371), Services-Computer Programming, Data Processing, Etc. (7370)

akta.pro primary industry

Verification IP (VIP) & Protocol Compliance Suites (HDAHAFAG)

Keywords

• ASIC design services
• FPGA verification consulting
• SystemVerilog UVM training
• RTL design services
• Semiconductor consulting

Headquarters

HQ city

Taastrup

HQ country

Denmark

HQ region

Europe

Offices1 record

Markets served

GTM type

B2B

Offering type

Services

Cost components

Personnel, Operations, Technology or R&D, Marketing or Sales, Infrastructure

Revenue model

1. ASIC/FPGA Design and Verification Consulting: Professional consulting services providing experienced engineering teams for ASIC/FPGA design and verification projects. Teams work onsite at client locations or offsite from SyoSil offices, delivering services ranging from short training engagements to full project outsourcing covering concept engineering through verification sign-off.
2. SystemVerilog/UVM Training Services: Industry-proven training courses including SystemVerilog for Verification (4 days), UVM methodology (3 days), and SystemVerilog Assertions (1 day). Customized to match client team needs with hands-on experienced instructors.
3. Open Source Software (UVM Scoreboard): UVM Scoreboard provided as free open source under Apache license, used to build community and demonstrate expertise rather than generate direct revenue.

Pricing tiers

Go-to-market motion2 records

Distribution channels1 record

Marketing channels4 records

Core offering

SyoSil provides experienced ASIC/FPGA design and verification teams that work side-by-side with clients onsite or offsite. Its offerings span specification, methodologies, RTL design, firmware design and test, virtual prototyping, and verification sign-off, supplemented by SystemVerilog/UVM training courses and an open-source UVM Scoreboard framework.

Product overview

SyoSil is a consulting company providing ASIC/FPGA design and verification services, founded in February 2003. The company's offerings include consulting services for System-on-Chip solutions (specification, methodologies, design and verification), professional SystemVerilog and UVM training courses, an open-source UVM Scoreboard tool, and internal code generation frameworks. The portfolio centers on verification strategies, advanced EDA tools, and formal methods using SystemVerilog/UVM methodologies. The company serves semiconductor clients across automotive, surveillance, and telecommunication industries.

Differentiator

Problem solved

Functional benefit

Products and services

• ASIC/FPGA Design and Verification Consulting Services Embedded engineering teams providing specification, RTL design, verification, firmware design and test, virtual prototyping, and verification sign-off for System-on-Chip and ASIC/FPGA projects. Teams work onsite at client sites or offsite from SyoSil's Taastrup offices, with headcount scaled from 2 to 10+ engineers based on project phase.
• SystemVerilog and UVM Training Courses Industrial training program offering SystemVerilog for Verification (4 days), UVM methodology (3 days), and SystemVerilog Assertions (1 day). Courses are customized to client team needs and delivered by instructors with active project experience in ASIC/FPGA verification.
• UVM Scoreboard Open-Source Framework An in-house built UVM scoreboard framework focused on scalability, architectural separation, and connectivity to foreign environments. Successfully used in UVM testbenches at various architectural levels, across RTL and SystemC models and on physical FPGA/ASIC devices. Distributed under the Apache license at no charge.

Named customers3 records

Segments4 records

Ideal customer profiles1 record

Technology focussed No

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature2 records

Partnerships

Three partnerships are on record, tiered core.

• SynopsyscoreTechnology or Integration · 1 February 2003EDA tool partnership providing SyoSil access to industry-leading verification tools including VCS and other Synopsys verification solutions for ASIC/FPGA design and verification projects.
• Cadence Design SystemscoreTechnology or Integration · 1 February 2003EDA tool partnership providing access to Cadence verification tools for use in SyoSil project execution and training programs for clients.
• EDA Vendor PartnerscoreTechnology or Integration · 1 February 2003SyoSil maintains knowledge of state-of-the-art EDA tools from major vendors enabling delivery of cutting-edge verification methodologies to clients across ASIC/FPGA projects.

Scale indicators4 records

Recent moves6 records

Expansion highlights5 records

Emerging players

• Agnisys: Agnisys provides automated specification-driven verification IP and register/memory management tools. It is an emerging player in the broader verification IP space where SyoSil also competes with its SyoGen code-generation framework.
• Breker Verification Systems: Breker focuses on portable stimulus and SoC verification automation. It is an emerging player in the verification methodology space SyoSil addresses and represents a possible next-generation methodology that could shift demand from UVM.

Broad incumbents

• Siemens EDA: Siemens EDA (formerly Mentor Graphics) provides Questa verification tools and a sizable professional services organization. It is a broad incumbent peer offering overlapping ASIC/FPGA verification tooling and services.
• Cadence Design Systems: Cadence is a top EDA vendor offering verification tools (e.g., Xcelium) plus design and verification services. It is a broad incumbent alternative to boutique players like SyoSil for ASIC/FPGA verification work.
• Synopsys: Synopsys is the leading EDA vendor and also operates a large professional services and verification IP business. It competes with SyoSil both as a tool provider and as a services alternative for ASIC/FPGA verification engagements.

Direct peers

• Truechip Solutions: Truechip provides ASIC design and verification services, verification IP, and training. It overlaps directly with SyoSil's SystemVerilog/UVM verification consulting and training offerings.
• AMIQ EDA: AMIQ EDA develops SystemVerilog/UVM verification tools (e.g., DVT Eclipse IDE) and provides consulting/training. It competes directly with SyoSil's tool-plus-services approach in the SystemVerilog verification niche.
• Silicon Interfaces: Silicon Interfaces offers ASIC design, verification, and firmware development services using SystemVerilog/UVM. It is a directly comparable boutique verification services peer to SyoSil.
• Paradigm Works: Paradigm Works is a semiconductor design services firm providing ASIC/FPGA design, verification, and embedded software consulting. It is directly comparable to SyoSil in service scope and customer base (semiconductor companies needing specialized engineering talent).
• Verilab: Verilab is a specialist ASIC/FPGA design and verification consultancy offering SystemVerilog/UVM services and training. It is a near-direct peer to SyoSil in terms of service offering, methodology focus, and boutique scale.

Market position

Weaknesses5 records

Competitive moat3 records

Key risks6 records

Key highlights7 records

Customer concentration

• LinkedInlinkedin.com/company/10019868

Revenue estimate

Valuation estimate

Number of profiles

Profiles4 records

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Syosil