What Verilab does

Verilab is a privately held functional verification consulting firm founded in April 2000 in Edinburgh, Scotland, by Tommy Kelly, Jason Sprott, and Mark Litterick, all three of whom remain in active leadership 26 years later (CEO, CTO, and Senior Vice President respectively). The firm specializes in ASIC and FPGA verification for complex silicon systems, deploying verification experts on client chip projects through staff augmentation and turnkey engagements. Its core technology expertise spans SystemVerilog, UVM, Specman/e, VHDL, and Verilog-AMS, and the firm maintains formal vendor-independent partnerships with both Cadence (Connections Verification Program) and Siemens EDA (OpenDoor/Questa Vanguard Techpartner).

The company's product set centers on professional services: long-term consulting engagements, fixed-duration consulting packages (typically 2-5 days) covering Verification Planning, Verification Capability Auditing, Chip Rescue, and Clock Domain Crossing, and intensive workshops on Advanced UVM, Requirements-Based Verification, and related topics. Auxiliary offerings include the published book 'Getting Started with UVM: A Beginner's Guide' and free open-source tools (svlib, etk, vlab_memoize) that serve primarily as marketing and community-engagement assets. The firm has completed over 500 projects for 100+ clients across 20 countries and four continents.

Verilab operates through five regional legal entities (Verilab, Inc. in the USA; Verilab Canada Inc.; Verilab Ltd. in the UK; Verilab GmbH in Germany; Verilab doo in Serbia) with physical offices in Austin (Lakeway, TX), Montreal/Ottawa, Edinburgh/Bristol, Munich, and Belgrade. Revenue is generated almost entirely through professional services billing; pricing is quote-based with no publicly disclosed rates. The firm has never raised external funding, has no disclosed private equity or venture backing, and has executed no acquisitions. Its go-to-market relies on a heavy content-marketing footprint (insights library, conference papers at DVCon and SNUG), direct enterprise sales, and a CV-library recruitment model that doubles as a talent pipeline.

Name

Verilab

Legal name

Verilab, Inc. (USA), Verilab Canada Inc. (Canada), Verilab Ltd. (UK), Verilab GmbH (Germany), Verilab doo (Serbia)

Website

https://verilab.com

Company type

Private

Founded year

2000

Operating status

Operating

Headcount range

11–50 employees

Short description

Verilab is a private, vendor-independent consulting firm providing functional verification services for ASIC and FPGA chip projects, serving semiconductor and EDA clients across North America and Europe with a senior expert team.

Ownership category

akta.pro rank

Product category

Semiconductor Verification Consulting

NAICS

Other Scientific and Technical Consulting Services (54169), Other Scientific and Technical Consulting Services (541690), Scientific Research and Development Services (5417)

SIC

Services-Engineering Services (8711), Services-Management Consulting Services (8742)

akta.pro primary industry

EDA Software Platforms (Digital Implementation, Verification & Signoff) (HDAHAFAA)

Keywords

• ASIC verification consulting
• FPGA verification services
• Semiconductor design verification
• UVM methodology consulting
• Verification IP development

Headquarters

HQ city

Glasgow

HQ country

United Kingdom

HQ region

Europe

Offices5 records

Markets served

GTM type

B2B

Offering type

Services

Cost components

Personnel, Operations, Marketing or Sales, Technology or R&D

Revenue model

1. Consulting Services: Expert functional verification consulting provided to semiconductor companies through staff augmentation and turnkey project engagements. Consultants are deployed to client chip projects.
2. Training and Workshops: Fixed-duration consulting packages (typically 2-5 days) involving training and focused problem solving. Also includes intensive workshops for client engineering teams.
3. Publications and Books: Sale of technical books including 'Getting Started with UVM: A Beginner's Guide' by Vanessa Cooper.

Pricing tiers

Go-to-market motion2 records

Distribution channels3 records

Marketing channels6 records

Core offering

Verilab provides functional verification consulting for ASIC and FPGA-based silicon systems, helping semiconductor clients achieve safe, on-time tape-outs. Engagements are delivered as long-term staff augmentation or turnkey development projects, supplemented by short, fixed-duration consulting packages (Verification Planning, Verification Capability Auditing, Chip Rescue, Clock Domain Crossing) and intensive workshops. The firm also publishes technical content including the book 'Getting Started with UVM: A Beginner's Guide' and free open-source tools such as svlib.

Product overview

Verilab is a professional services company providing ASIC and FPGA functional verification consulting. The core offering consists of verification consulting services for complex silicon systems, augmented by fixed-duration consulting packages (Verification Planning, Verification Capability Auditing, Chip Rescue, Clock Domain Crossing) and intensive technical workshops. The company also offers published resources including the book 'Getting Started with UVM: A Beginner's Guide' and several open-source verification tools: the Specman/e Toolkit (etk) for e code analysis, vlab_memoize for Specman/e memoization, and svlib, a comprehensive SystemVerilog utility library.

Differentiator

Problem solved

Functional benefit

Products and services

• ASIC & FPGA Verification Consulting Services Functional verification consulting for complex silicon systems, helping semiconductor clients achieve safe, on-time tape-outs via staff augmentation or turnkey development engagements. Services cover reusable verification environments, verification IP development, methodology re-engineering, project management, reviews, auditing, coaching, and training.
• Consulting Packages Fixed-duration consulting packages lasting two to five days, typically involving training and focused problem solving in the specific client chip project in progress. Currently available packages include Verification Planning, Verification Capability Auditing, Chip Rescue, and Clock Domain Crossing.
• Workshops Intensive workshops designed to rapidly increase client engineering team capabilities. Examples include Advanced UVM, Verification Planning and Management, Requirements-Based Verification Process, and Clock Domain Crossing Design and Verification.
• Getting Started with UVM: A Beginner's Guide Introductory technical text for digital verification engineers needing to ramp up on the Universal Verification Methodology quickly, filled with working examples and practical explanations. Authored by Vanessa Cooper.
• svlib - SystemVerilog Utility Library Free, open-source library of utility functions for SystemVerilog including file and string manipulation, regular expressions, configuration file handling, environment variables, and wall-clock time access.
• Specman/e Toolkit (etk) Free Perl script that analyzes e code, allowing users to query testbenches for classes, methods, enumerated types, coverage groups, and other structural elements.
• vlab_memoize Specman Package Free Specman/e package providing a memoization utility for methods, available on GitHub.

Quantifiable outcome

• 26 years of verification expertise
• +3 more outcomes

Named customers2 records

Segments4 records

Ideal customer profiles3 records

Technology focussed No

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature7 records

Partnerships

Two partnerships are on record, tiered core.

• Cadence Design SystemscoreTechnology or IntegrationVerilab is a proud member of the Cadence Connections Verification Program, providing access to the latest Cadence tools, techniques and support to keep their team in peak condition.
• Siemens EDAcoreTechnology or IntegrationVerilab is a Siemens OpenDoor/Questa Vanguard Techpartner, providing access to Siemens/Siemens EDA tools and support for verification projects.

Scale indicators5 records

Recent moves9 records

Expansion highlights5 records

Broad incumbents

• Siemens EDA (formerly Mentor Graphics): Major EDA vendor with Questa simulation, formal verification, and verification IP products; Verilab holds OpenDoor/Questa Vanguard Techpartner status with Siemens EDA, and the two compete and collaborate on functional verification engagements for chip designers.
• Cadence Design Systems: EDA leader providing verification tools (Xcelium, JasperGold) and a partner program that Verilab participates in directly; Cadence's verification methodology services and VIP overlap with Verilab's consulting footprint while serving the same semiconductor customer base.
• Synopsys: Global EDA leader with verification IP (VIP), simulation tools (VCS), and consulting services; comparable to Verilab because it sells into the same ASIC/SoC verification workflow and offers methodology services to chip designers, albeit at vastly larger scale.

Direct peers

• Avery Design Systems: Provider of verification IP, methodology tools, and consulting for SoC and ASIC designs; overlaps with Verilab in UVM-based verification methodology and serves overlapping semiconductor customer profiles.
• Truechip Solutions: Verification IP and design services company providing VIP, methodology consulting, and turnkey verification projects for ASIC/SoC customers; directly competes with Verilab in chip-rescue and verification environment development work.
• Paradigm Works: Semiconductor engineering consulting firm providing ASIC design, verification, and methodology services; comparable boutique scale and similar clientele of fabless semiconductor and IP companies seeking independent verification expertise.
• Veriest Solutions: Boutique semiconductor engineering services firm offering ASIC design, verification, embedded software, and DFT consulting; the closest direct competitor to Verilab in size, geography (Israel/Serbia/EU), and boutique verification services positioning.
• Brite Semiconductor: ASIC design services and IP company providing turnkey SoC design and verification; comparable in offering chip-level verification services to fabless customers, though at larger scale than Verilab and more productized.
• Agnisys: EDA company focused on register and sequence automation, UVM/verification IP generation, and methodology consulting for chip verification; competes with Verilab on productivity-driven verification engagements.

Emerging players

• OneSpin Solutions (now Siemens EDA): Formal verification IP and tools provider (acquired by Siemens EDA in 2021); overlaps with Verilab's formal CDC verification offering and addresses adjacent verification needs for semiconductor customers.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat4 records

Key risks6 records

Key highlights6 records

Customer concentration

• Xx.com/verilab
• LinkedInlinkedin.com/company/verilab

Revenue estimate

Valuation estimate

Number of profiles

Profiles5 records

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about Verilab