LEGaTO

What LEGaTO does

LEGaTO was an EU Horizon 2020 research project (Grant Agreement No. 780681) that operated from December 2017 through 2020, coordinated by the Barcelona Supercomputing Center (BSC). Its objective was to build an integrated, open-source software toolset that enables energy-efficient execution of applications on heterogeneous hardware, spanning CPUs, GPUs, and FPGAs. The consortium brought together six academic partners — BSC, Chalmers University of Technology, University of Neuchâtel, Bielefeld University, TU Dresden, and Technion — and one industrial partner, Xilinx, covering programming models, runtime systems, fault tolerance, and hardware energy optimization. The project targeted a 10x energy-efficiency improvement over conventional heterogeneous software stacks, addressing the growing energy cost of computation in HPC, embedded, and edge settings.

The toolset comprised several components: OmpSs (a task-based programming model extending OpenMP), XiTAO (a task scheduling framework), Nanos++ (a lightweight runtime), FTI (Fault Tolerance Interface), DFiant (an HDL for hardware/software co-design), and FPGA Undervolting techniques for software-controlled voltage scaling. These were integrated into a coherent stack and demonstrated in three application domains: healthcare, smart cities/IoT, and machine learning inference. LEGaTO also contributed to the PICMG COM-HPC standardization effort for next-generation embedded computing modules, attempting to embed energy-awareness into emerging industrial standards.

LEGaTO was not a commercial enterprise. It had no pricing model, no revenue, no paying customers, and no go-to-market motion. Its funding came entirely from the EU Horizon 2020 research and innovation program, and its deliverables were open-source software artifacts. The consortium itself functioned as the operating structure, with BSC serving as the coordinating node. As a time-bounded public research initiative rather than a commercial entity, LEGaTO's "business model" is best characterized as grant-funded collaborative research with open-source output.

Name

LEGaTO

Legal name

LEGaTO (Low Energy Toolset for Heterogeneous Computing)

Website

https://legato-project.eu

Company type

Private

Founded year

2017

Operating status

Closed

Headcount range

11–50 employees

Short description

LEGaTO was an EU Horizon 2020-funded research project (2017–2020), coordinated by the Barcelona Supercomputing Center, that developed an open-source software toolset for energy-efficient heterogeneous computing across CPUs, GPUs, and FPGAs.

Ownership category

akta.pro rank

Product category

Heterogeneous Computing Software Tools

NAICS

Computer Systems Design and Related Services (5415), Computing Infrastructure Providers, Data Processing, Web Hosting, and Related Services (5182)

SIC

Services-Prepackaged Software (7372), Services-Computer Programming, Data Processing, Etc. (7370)

akta.pro primary industry

AI Compiler, Runtime & Kernel Optimization Software (CUDA/ROCm/XLA, graph compilers) (HDAAAAAI)

akta.pro secondary industries

On-Device Inference Runtimes & SDKs (mobile/embedded) (HDAAAJAB), GPU/Accelerator Compute Servers (HDABADAC)

Keywords

• Heterogeneous computing
• Energy-efficient computing
• Task-based programming
• FPGA programming models
• HPC runtime systems

Headquarters

HQ city

Barcelona

HQ country

Spain

HQ region

Europe

Offices6 records

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Marketing or Sales, Infrastructure

Revenue model

1. EU Research Funding (Horizon 2020): LEGaTO is funded by the European Union's Horizon 2020 research and innovation programme under grant agreement No 780681. This is a research grant, not commercial revenue.

Go-to-market motion1 record

Distribution channels1 record

Marketing channels7 records

Core offering

LEGaTO developed an open-source software toolset for energy-efficient heterogeneous computing targeting CPU-GPU-FPGA platforms. The offering combines the OmpSs task-based programming model (with OmpSs@FPGA extension), the XiTAO energy-aware runtime, the FTI fault-tolerance/checkpointing library, and the DFiant dataflow HDL, all released as open source and demonstrated across healthcare, smart city, smart home, machine learning, and secure IoT use cases.

Product overview

LEGaTO (Low Energy Toolset for Heterogeneous Computing) is a Horizon 2020 EU research project that developed a made-in-Europe software stack for energy-efficient computing on heterogeneous hardware. The core architecture consists of the OmpSs programming model with XiTAO and Nanos runtime systems for task-based execution and energy-aware scheduling on CPU-GPU-FPGA platforms. Key software components include the FTI library for fault tolerance/checkpointing and DFiant HDL for dataflow hardware design. The project demonstrated these tools through use cases in healthcare, smart cities, smart homes, machine learning, and secure IoT. The system targets both edge computing (via modular COM-HPC edge servers) and HPC/datacenter environments, with FPGA undervolting as a key energy optimization technique achieving up to 90% power reduction.

Differentiator

Problem solved

Functional benefit

Products and services

• LEGaTO Software Toolset Open-source software stack supporting energy-efficient computing on CPU-GPU-FPGA heterogeneous hardware and FPGA-based dataflow engines, comprising OmpSs, XiTAO, Nanos, FTI, DFiant HDL, and FPGA undervolting tools. Targeted at HPC and edge-computing researchers and developers.
• OmpSs Programming Model Task-based parallel programming model that enables execution across multiple processors and accelerators, extended with OmpSs@FPGA to simplify FPGA programming. For HPC, embedded, and ML developers targeting heterogeneous platforms.
• XiTAO Runtime Energy-aware task-based runtime that performs interference-aware and energy-aware scheduling on heterogeneous CPU-GPU-FPGA platforms, dynamically learning platform characteristics to schedule around dynamic performance asymmetry. Achieves up to 3x energy savings on VGG16 deep learning models and up to 90% energy savings in certain configurations.
• FTI (Fault Tolerance Interface) Open-source library for fast and efficient multilevel checkpointing in large-scale supercomputers, using local storage, data replication, and erasure codes, with application-level checkpointing, HDF5 support, and differential/incremental checkpointing. Reduces checkpointing time by up to 62%. For HPC application developers and operators of large-scale systems.
• DFiant HDL Dataflow Hardware Description Language developed at Technion that decouples design functionality from underlying technology, providing abstractions beyond the RTL behavioral model to reduce verbosity and maintain portable hardware designs. For FPGA and hardware designers.
• LEGaTO Edge Server Heterogeneous, modular, scalable hardware platform built on the COM-HPC standard for integration of CPU, GPU, FPGA, and accelerator microservers. Designed for edge computing deployments combining LEGaTO software with European-standard hardware.

Quantifiable outcome

• 10x improvement in energy-efficiency for heterogeneous hardware
• +5 more outcomes

Named customers3 records

Segments3 records

Ideal customer profiles3 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

AI capability5 records

Feature6 records

Partnerships

Eleven partnerships are on record, tiered strategic, minor and core.

• PICMG (PCI Industrial Computer Manufacturers Group)strategicStrategic or Co-development Partner · 30 January 2020LEGaTO partner Bielefeld University participates in PICMG standardization of COM-HPC computer-on-module form factor, working with companies like congatec, Kontron, Intel, and Adlink Technology.
• EPEEC ProjectminorStrategic or Co-development Partner · 26 October 2018European project collaborating on joint FPGA training courses and programming model research.
• EuroEXA ProjectminorStrategic or Co-development Partner · 14 May 2018Collaborative EU project that co-organizes OmpSs@FPGA tutorials with LEGaTO and shares FPGA programming expertise.
• M2DC ProjectminorStrategic or Co-development Partner · 15 March 2018H2020 project sharing booth at ISC conference for joint dissemination activities around modular microserver technology.
• XilinxcoreStrategic or Co-development Partner · 13 February 2018Xilinx collaborates on FPGA training courses and OmpSs@FPGA programming for Xilinx Vivado HLS tools. Xilinx University Program supports training for next generation researchers.
• Barcelona Supercomputing Center (BSC)coreStrategic or Co-development Partner · 14 December 2017BSC serves as the project coordinator for LEGaTO. Osman Unsal and Adrian Cristal are the project coordinators from BSC. BSC provides the OmpSs programming model and OmpSs@FPGA technology.
• Chalmers University of TechnologycoreStrategic or Co-development Partner · 14 December 2017Chalmers contributes the XiTAO runtime for energy-aware scheduling. Miquel Pericàs leads the runtime system work package.
• Université de Neuchâtel (UNINE)coreStrategic or Co-development Partner · 14 December 2017UNINE contributes security research including work on ARM TrustZone and trusted applications, and fault tolerance research.
• Bielefeld University (CITEC)coreStrategic or Co-development Partner · 14 December 2017Bielefeld University leads hardware design work package and COM-HPC standardization efforts. Develops smart home use cases and hosts Industrial Advisory Board meetings.
• Technische Universität DresdencoreStrategic or Co-development Partner · 14 December 2017TU Dresden contributes SGX-PySpark secure distributed data analytics research using Intel SGX and SCONE platform.
• Technion - Israel Institute of TechnologycoreStrategic or Co-development Partner · 14 December 2017Technion developed DFiant HDL, a dataflow hardware description language as part of the LEGaTO project.

Scale indicators7 records

Recent moves6 records

Expansion highlights4 records

Others

• EPEEC Project: EPEEC is an EU project that collaborated with LEGaTO on joint FPGA training courses and programming model research, making it a thematic peer in the European heterogeneous computing research landscape.
• Barcelona Supercomputing Center (BSC): BSC coordinated LEGaTO and contributed the OmpSs programming model. As the lead consortium partner and broader HPC institution, BSC is the most directly comparable ecosystem participant even though it is not a commercial peer.
• Mont-Blanc Project: Mont-Blanc is an EU-funded project developing energy-efficient HPC systems based on European processor technology, sharing LEGaTO's energy-efficiency mandate and European ecosystem context.
• EuroEXA Project: EuroEXA is a sibling EU Horizon 2020 HPC project that co-organized OmpSs@FPGA tutorials with LEGaTO and shared FPGA programming expertise. It is thematically comparable as a parallel EU HPC initiative rather than a commercial competitor.

Emerging players

• GreenWaves Technologies: GreenWaves builds ultra-low-power AI processors for edge devices with a software SDK, addressing the same energy-efficient edge AI use case LEGaTO demonstrated via FPGA undervolting and XiTAO scheduling.
• Achronix Semiconductor: Achronix is an independent FPGA vendor with its own toolchain targeting high-performance and AI workloads. As a niche FPGA player competing alongside Xilinx and Intel, it represents an adjacent peer in the LEGaTO-targeted heterogeneous computing ecosystem.

Direct peers

• SiPearl: SiPearl is designing European HPC processors for EuroHPC supercomputers with a parallel programming and runtime software stack. As a fellow European-funded sovereign heterogeneous compute initiative, it shares LEGaTO's strategic positioning and ecosystem context.
• Kalray: Kalray is a European fabless semiconductor company building manycore processors and a software stack for heterogeneous AI and data-intensive workloads. Its combination of proprietary accelerator hardware with parallel programming software closely mirrors LEGaTO's heterogeneous compute stack model.
• XMOS: XMOS develops heterogeneous multicore microcontrollers with a software toolchain for task-based parallel programming, conceptually similar to LEGaTO's OmpSs programming model for CPU-FPGA-accelerator platforms.
• Maxeler Technologies: Maxeler developed dataflow computing engines that were directly integrated as part of the LEGaTO software toolchain. As a fellow provider of heterogeneous compute acceleration software/hardware with a similar European origin, Maxeler is the closest direct peer.

Market position

Strengths4 records

Weaknesses4 records

Competitive moat4 records

Key risks5 records

Key highlights6 records

Customer concentration

• LinkedInlinkedin.com/company/legato-project

Revenue estimate

Valuation estimate

Number of profiles

Funding overview

Funding rounds

Investors

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M&A

Investments

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Frequently asked questions about LEGaTO