SimPlus Verification

Name

SimPlus Verification

Website

https://RtlVerification.com

Company type

Private

Founded year

2002

Operating status

Operating

Headcount range

1–10 employees

Ownership category

akta.pro rank

Product category

Electronic Design Automation (EDA) Hardware Verification Software

NAICS

Custom Computer Programming Services (541511)

SIC

Services-Prepackaged Software (7372)

akta.pro primary industry

Verification IP (VIP) & Protocol Compliance Suites (HDAHAFAG)

Keywords

• Hardware verification software
• RTL verification
• Pre-silicon validation
• EDA verification tools
• Semiconductor verification

Headquarters

HQ city

Tel Aviv

HQ country

Israel

HQ region

Middle East

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Marketing or Sales

Revenue model

1. Software Licenses and Products: SPV sells verification software products including the SPV verification environment, MATLAB integration (DPF), Python verification tools, HDL Explorer, and SpvGui. Revenue appears to come from software licensing of these verification tools to hardware engineering teams.

Go-to-market motion1 record

Distribution channels1 record

Marketing channels1 record

Core offering

SimPlus Verification develops and sells SPV (Simulator Plus Verification), a C++ based hardware verification environment combining a compiler, simulator, editor, linker, debugger, and natural-language-to-simulator interface, sold primarily to semiconductor and hardware design engineering teams. The core product is extended by add-on modules — Python Verification, MATLAB Integration (DPF), Coverage Deriving Verification, HDL Explorer, SpvGui, the VerilogEditor, and Pre-Silicon Software Validation — and complemented by subcontracted verification project services in which SimPlus engineers build verification environments for clients.

Product overview

SimPlus Verification offers SPV (Simulator Plus Verification) as a unified core verification environment — a compiler and simulator — with multiple specialized add-on modules and tools. The core SPV platform uses C++ as the primary language and provides an editor, compiler, linker, and debugger. It integrates with Python Verification for Python-based verification workflows and with MATLAB Integration (DPF library) for mathematical and wireless simulation. Additional modules include Coverage Deriving Verification for achieving 100% coverage, HDL Explorer for HDL code navigation, SpvGui for smart GUI-based testing and regression, Pre-Silicon Software Validation for embedded debugging, and VerilogEditor for hardware description language editing. The company also offers subcontractor project services. SPV additionally integrates to SystemVerilog, Specman, and all simulators and platforms.

Differentiator

Problem solved

Functional benefit

Brands

• SPV: Compiler + Simulator Plus Verification environment for hardware verification, supporting C++, Python, MATLAB integration, and SystemVerilog & Specman interfaces.

Products and services

• SPV (Simulator Plus Verification) Core verification environment combining a C++ based compiler and simulator with editor, linker, debugger, and a natural language-to-simulator interface. Designed for hardware engineering teams that need to perform RTL verification, mixed-language simulation, and pre-silicon software validation.
• Python Verification Module that enables mixing Python with the SPV verification environment, allowing users to leverage Python's attributes to generate, stimulate, and check design behavior. Targeted at hardware verification engineers who want to combine Python scripting with the SPV environment.
• MATLAB Integration (DPF Library) Library (DPF) that imports MATLAB capabilities into the SPV verification environment, enabling any MATLAB function to be called at runtime, using the MATLAB engine and mutual memory. Used for modem and wireless simulation, mathematical calculations, and bit-level correction within verification flows.
• Coverage Deriving Verification Verification methodology delivered on top of SPV that targets 100% coverage and 100% efficiency in hardware design verification. Marketed to verification teams that need to close coverage gaps on complex RTL/SoC designs.
• HDL Explorer Tool for exploring and navigating HDL (Hardware Description Language) code within the SPV product suite, helping hardware engineers analyze and traverse designs as part of verification workflows.
• SpvGui Smart GUI for testing, regression, and general verification workflow management within the SPV verification environment. Used by verification engineers to manage test execution and regression suites.
• Pre-Silicon Software Validation Module focused on validating embedded software prior to silicon tape-out, including embedded debugging capabilities. Targeted at teams that need to run and debug firmware/software on virtual hardware before fabrication.
• Verification Projects Subcontractor Services Subcontracting service in which SimPlus Verification engineers develop verification environments for clients, while the client's hardware engineers run simulations alongside them, delivering a quality product in a short time at low cost. Aimed at semiconductor and hardware design teams that lack sufficient in-house verification capacity.
• VerilogEditor Editor tool in the SPV product suite that provides fast and smart editing of Verilog and HDL source code, supporting the RTL verification workflow.

Quantifiable outcome

• 5X faster simulation performance
• +1 more outcomes

Segments1 record

Ideal customer profiles1 record

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Integration3 records

Feature9 records

Recent moves5 records

Expansion highlights4 records

Emerging players

• OneSpin Solutions: OneSpin provides formal verification and assertion-based verification tools targeting RTL coverage and verification quality. Its focus on achieving high coverage with formal methods overlaps with SPV's coverage-deriving verification positioning in the semiconductor verification market.
• Real Intent: Real Intent offers EDA tools for RTL sign-off, CDC verification, and static/dynamic checks. It complements the simulation market SPV serves and targets similar pre-silicon quality and coverage concerns for semiconductor and SoC design teams.
• Agnisys: Agnisys offers EDA tools for register management, SoC integration, and design/verification automation. Its semiconductor verification tooling focus and small-scale niche positioning make it an adjacent comparable for SPV's subcontractor verification services and tool suite.
• Metrics Design Automation: Metrics Design Automation provides verification IP and constrained-random methodologies for SoC design. Its verification methodology focus overlaps with SPV's coverage-deriving verification approach and integration with SystemVerilog/Specman ecosystems.
• Breker Verification Systems: Breker focuses on portable stimulus and system-level SoC verification, intersecting with SPV's coverage-deriving methodology and subcontractor model. Both serve semiconductor verification teams seeking higher coverage and efficiency in pre-silicon validation.
• Verilab: Verilab is a specialist verification consultancy that develops verification environments and methodologies for semiconductor clients. Its subcontractor engineering model is directly comparable to SPV's 'projects sub-contractor' service for verification environment development.

Direct peers

• Aldec: Aldec provides Riviera-PRO and other HDL simulation and verification tools targeted at FPGA, ASIC, and SoC design teams. Aldec's focus on mixed-language simulation, debugging, and verification methodology makes it a close comparable to SPV's verification environment offering.
• Cadence Design Systems (Xcelium): Cadence's Xcelium is a core RTL and SoC verification simulator competing for the same pre-silicon validation workloads. Cadence also offers Jasper formal and Perspec system-level tools, making it a direct broad incumbent to SPV's combined simulation-coverage methodology.
• Synopsys (VCS): Synopsys is the dominant EDA vendor; its VCS simulator is the market-leading RTL/system verification engine. VCS overlaps directly with SPV's SPV verification environment for HDL simulation, coverage, and debug, targeting the same semiconductor and SoC design teams.
• Siemens EDA (Questa / ModelSim): Siemens EDA's Questa and ModelSim simulators serve RTL and mixed-language verification, directly competing with SPV's SPV tool, especially for teams needing SystemVerilog and mixed-language support alongside coverage-driven verification.

Market position

Strengths4 records

Weaknesses5 records

Competitive moat3 records

Key highlights5 records

Customer concentration

Revenue estimate

Valuation estimate

Number of profiles

Profiles1 record

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about SimPlus Verification