What DVCon does

DVCon U.S. is an annual design and verification conference for the semiconductor and electronic design automation (EDA) industry, established in 1988 and now in its 38th year. Organized under the not-for-profit parent Accellera Systems Initiative Inc., the conference provides a venue for sharing practical applications of specialized design and verification languages (SystemVerilog, Verilog, VHDL, PSS, SystemC, e) and general-purpose languages (C, C++, Python, PERL, Tcl), along with methodologies including formal verification, hardware-assisted verification, hardware/software co-verification, testbench automation, functional safety, security verification, low-power design, 3D chip design, mixed-signal design, and AI/ML in verification. The 2027 edition is scheduled for March 1-4 at the Hyatt Regency Santa Clara. Programming comprises technical paper presentations, tutorials and workshops on Accellera standards (UVM, PSS, IP-XACT, UPF, CDC/RDC), industry keynotes, panel discussions, a poster track (including the Poster Ninja Warrior competition), an exhibition hall, and a new RTL Design & Verification Hackathon hosted with QuickSilicon. The Stuart Sutherland Best Paper Award, sponsored by AMIQ EDA, anchors the recognition track.

The event is operated by a steering committee of senior engineers from Synopsys, Arteris, NVIDIA, Cadence, Siemens EDA, Big Fish EDA, and Accellera, with day-to-day management outsourced to Conference Catalysts, LLC. Reach and demand are evidenced by named participants including Samsung, Intel, NVIDIA, AMD, Micron Technology, Cadence Design Systems, Siemens EDA, and Synopsys.

DVCon's business model is a mix of paid conference registrations (tiered passes at $775-$850 for All Access, $650-$725 for Conference Only, $400-$450 for One Day, free Exhibits Only), corporate sponsorships (Platinum $45,000, Gold $11,000, Silver $8,500), exhibitor booth fees ($5,000-$6,000), and ancillary sponsor benefits (sponsored lunches, receptions, attendee-list access, promotional items). Registration is processed through CVENT, and proceedings are distributed electronically with speaker presentations posted three months post-event. Marketing relies on earned media through Electronic Engineering Journal and SemiWiki, LinkedIn campaign tracking, email distribution to attendee lists, and co-marketing with sponsors. Geographic scope is currently domestic (USA, California), though the parent Accellera operates internationally. Headcount is listed at 1-10, reflecting the lean volunteer committee structure with operational execution outsourced to the conference management firm.

Name

DVCon

Legal name

Accellera Systems Initiative Inc.

Website

https://dvcon.org

Company type

Private

Founded year

1988

Operating status

Operating

Headcount range

1–10 employees

Short description

DVCon is a 38-year-old annual design and verification conference for the semiconductor and EDA industries, organized by Accellera Systems Initiative, monetized through tiered registrations, corporate sponsorships, and exhibitor booth sales, and serving design and verification engineers with technical sessions, standards workshops, and keynotes.

Ownership category

akta.pro rank

Product category

Technical Conference Services

NAICS

Convention and Trade Show Organizers (561920), Professional Organizations (81392)

akta.pro primary industry

Virtual/Hybrid Conference Production & Platform Management (THAHACAM)

Keywords

• Design verification conference
• Electronic design automation
• Semiconductor verification events
• EDA standards development
• Verification methodology forum

Headquarters

HQ city

Louisville

HQ country

United States

HQ region

North America

Offices1 record

Markets served

GTM type

B2B

Offering type

Services

Cost components

Operations, Marketing or Sales, Personnel, Technology or R&D, Infrastructure, Others

Revenue model

1. Conference Registration Fees: DVCon generates revenue through paid conference registrations. Fee tiers include All-Access passes (Monday-Thursday), Conference Only (Tuesday & Wednesday), One Day Only, Exhibits Only (free), and Tutorials/Workshops Only passes. Registration fees range from $775-$850 depending on early/advance/onsite periods.
2. Sponsorship and Exhibition Fees: DVCon generates revenue through corporate sponsorship tiers (Platinum at $45,000, Gold at $11,000, Silver at $8,500) and exhibitor booth fees ($5,000-$6,000). Additional sponsorship opportunities include sponsored lunches, receptions, workshops, tutorials, promotional items, and attendee list access.
3. Conference Proceedings and Content: DVCon proceedings are distributed electronically to registered attendees. Speaker presentations become available on the website 3 months after the conference ends.

Pricing tiers

Go-to-market motion1 record

Distribution channels3 records

Marketing channels5 records

Core offering

DVCon U.S. is an annual in-person conference and exhibition on the practical application of design and verification languages, tools, and methodologies for electronic systems and integrated circuits. It delivers a multi-day program of technical paper sessions, tutorials, workshops, panels, poster sessions, sponsored lunches, and an exhibition hall with tool and IP vendors. The conference is supported by paid attendee registrations, multi-tier corporate sponsorships, exhibitor booths, and electronic proceedings distributed to attendees.

Product overview

DVCon U.S. is the premier annual conference and exhibition focused on electronic design and verification. The event features a multi-day program combining technical paper sessions, tutorials/workshops on standards and methodologies, panel discussions, sponsored lunches, exhibition hall with tool/IP vendors, poster sessions, and competitive events like the RTL Hackathon. The core offering is the annual conference delivering education and networking for verification engineers, with proceedings published electronically. Key program elements include the Stuart Sutherland Best Paper & Poster Awards, AI-focused technical tracks, and workshops on Accellera standards (UVM, PSS, IP-XACT, UPF).

Differentiator

Problem solved

Functional benefit

Products and services

• DVCon U.S. Annual Conference and Exhibition Premier annual in-person conference and exhibition on the practical application of design and verification languages, tools, and methodologies for electronic systems and integrated circuits, featuring technical paper sessions, keynotes, panels, tutorials, workshops, poster sessions, and an exhibition hall, targeted at design and verification professionals, EDA tool vendors, and the academic community.
• Conference Proceedings Electronically distributed collection of accepted technical papers from the conference, provided to registered attendees and made available online through the dvcon-proceedings.org archive, with speaker presentations posted approximately three months after the conference.

Named customers8 records

Segments4 records

Ideal customer profiles3 records

Technology focussed No

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Integration4 records

Partnerships

One partnership is on record.

• Accellera Systems InitiativecoreStrategic or Co-development PartnerAccellera Systems Initiative is the independent, not-for-profit organization that is the conference sponsor of DVCon U.S. Accellera creates, supports, promotes, and advances system-level design, modeling, and verification standards for use by the worldwide electronics industry. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera are contributed to the IEEE for formal standardization.

Scale indicators3 records

Recent moves6 records

Expansion highlights5 records

Emerging players

• Synopsys Chiplet Conference / Various chip-vertical events: New vertical chip-design conferences (chiplet, 3D-IC, automotive functional safety) are emerging and competing for narrow subsets of DVCon's verification audience. They are emerging peers that could siphon both sponsors and attendees over time.
• RISC-V Summit: RISC-V Summit is an emerging conference covering the RISC-V instruction set architecture ecosystem, including verification and SoC design flows. It captures a growing share of verification engineer attention as RISC-V adoption expands, partially overlapping with DVCon's verification track.

Direct peers

• DesignCon: DesignCon is a technical conference for electronic design engineers focused on signal integrity, power integrity, and high-speed design. It targets an adjacent but overlapping engineering audience and competes for similar sponsor dollars from EDA and test-and-measurement vendors.
• SNUG (Synopsys Users Group): SNUG is Synopsys' flagship user conference covering EDA tool usage, verification methodologies, and design flows. It competes directly with DVCon for design/verification engineer attendance and Synopsys sponsorship investment.
• CadenceLIVE: CadenceLIVE is Cadence Design Systems' annual user conference covering EDA tool flows and methodologies. It directly competes with DVCon for Cadence-tool-user mindshare, sponsorship dollars, and attendee time, and Cadence is a major DVCon sponsor/exhibitor.
• ICCAD (IEEE/ACM International Conference on Computer-Aided Design): ICCAD is the flagship IEEE/ACM academic conference on EDA, computer-aided design, and verification research. It overlaps with DVCon on verification methodology content and EDA-vendor sponsorship, but skews more academic.
• DAC (Design Automation Conference): DAC is the premier EDA and design automation conference covering synthesis, verification, and EDA tool research. It is DVCon's closest direct peer, addressing similar design/verification engineers with a broader academic-industry mix and overlapping EDA vendor sponsorship base.
• ARM DevSummit: ARM DevSummit is ARM's developer conference covering Arm-based SoC design, verification, and software. It targets similar verification engineers, particularly those working on processor and SoC verification, and competes for related EDA vendor sponsorship.

Regional players

• Embedded World: Embedded World is the leading European conference on embedded systems, including verification and design tools. It is a regional peer targeting similar engineering audiences in Europe, complementing rather than directly competing with DVCon's U.S.-only event.

Broad incumbents

• Semicon (SEMI): SEMICON events are the broadest semiconductor manufacturing and supply-chain conferences globally. They target a much wider audience than DVCon but compete for overall semiconductor industry sponsorship and senior executive attention.

Market position

Strengths5 records

Weaknesses4 records

Competitive moat5 records

Key risks5 records

Key highlights7 records

Customer concentration

• LinkedInlinkedin.com/company/accellera-systems-initiative
• Xx.com/dvcon_us
• Facebookfacebook.com/DVCon

Revenue estimate

Valuation estimate

Number of profiles

Profiles10 records

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about DVCon