Chips Joint Undertaking
Chips JU is the European tripartite public-private partnership implementing the EU Chips Act, disbursing nearly €11 billion to fund semiconductor R&I across pilot lines, design platforms, competence centres, and skills development, serving industry, SMEs, research institutions, and EU Member States.
- Company typePrivate
- Founded2021
- HeadquartersBrussels, Belgium
- Headcount51–100
- GTM typeB2B
- OfferingServices
What Chips Joint Undertaking does
Chips Joint Undertaking (Chips JU) is a European tripartite public-private partnership headquartered in Brussels that implements the European Chips Act's R&I funding mandate. Established in 2021 as the Key Digital Technologies (KDT) Joint Undertaking, it was renamed and expanded in September 2023 following the European Chips Act entry into force, with the EU contribution rising from €1.8 billion to €4.175 billion and a total programme budget of nearly €11 billion including national and private co-investments. Chips JU operates through two pillars: (1) the Chips for Europe Initiative, funding Pilot Lines (NanoIC at imec for sub-2nm SoC, FAMES at CEA-Leti for FD-SOI and embedded NVM, APECS at FMD for advanced packaging, PIXEurope for photonics, and Quantum Pilot Lines), a European Design Platform, a network of Chips Competence Centres, and skills development; and (2) Electronic Components and Systems Research & Innovation (ECS R&I), funding materials, equipment, and methods across AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics.
The organisation does not sell commercial products or services. Instead, it disburses public funding through competitive open calls published on the EU Funding & Tenders Portal, where eligible applicants — large industry players, SMEs, startups, research institutions, and academia — submit proposals that are evaluated by independent expert panels. Funding is delivered through grant agreements under Horizon Europe and the Digital Europe Programme, with co-financing from Participating States (EU Member States plus the UK, which joined in March 2024) and the three Private Members (AENEAS, EPoSS, INSIDE industry associations).
Chips JU is governed by a tripartite structure: the European Commission (represented by DG CNECT and DG RTD), the Participating States through the Public Authorities Board, and the Private Members Board. The executive leadership transitioned in late 2024 with Dr Stefan Finkbeiner appointed as Governing Board Chair, replacing Ralf Bornefeld. Chips JU complements its funding role with ecosystem-building activities including brokerage events, info days, technical workshops, and international collaborations with the Republic of Korea, Japan, India, Singapore, and Taiwan — explicitly addressing Europe's strategic autonomy in semiconductors and a projected shortage of ~65,000 skilled professionals by 2030.
Chips Joint Undertaking firmographics
Firmographics- Name
- Chips Joint Undertaking
- Legal name
- Chips Joint Undertaking
- Website
- https://chips-ju.europa.eu
- Company type
- Private
- Founded year
- 2021
- Operating status
- Operating
- Headcount range
- 51–100 employees
- Short description
- Chips JU is the European tripartite public-private partnership implementing the EU Chips Act, disbursing nearly €11 billion to fund semiconductor R&I across pilot lines, design platforms, competence centres, and skills development, serving industry, SMEs, research institutions, and EU Member States.
- Ownership category
- akta.pro rank
Chips Joint Undertaking industry classification
Industry- Product category
- Semiconductor R&I Public Funding
- NAICS
- Scientific Research and Development Services (5417), Semiconductor Machinery Manufacturing (333242), Semiconductor and Related Device Manufacturing (334413), Research and Development in Nanotechnology (541713)
- SIC
- Semiconductors & Related Devices (3674), Services-Commercial Physical & Biological Research (8731)
- akta.pro primary industry
- Foundry Platform & Design Enablement Services (PDK/DFM/Process Qualification) (HDAHACAJ)
- akta.pro secondary industries
- Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC) (HDAHABAC), Logic Foundries (Advanced Nodes) (HDAHACAA), National Development Banks & State Development Finance Institutions (DFIs) (BPADACAC)
Keywords
Where Chips Joint Undertaking is headquartered
LocationHeadquarters
- HQ city
- Brussels
- HQ country
- Belgium
- HQ region
- Europe
Offices1 record
Markets served
Chips Joint Undertaking business model
Business model- GTM type
- B2B
- Offering type
- Services
- Cost components
- Personnel, Operations, Technology or R&D, Infrastructure, Others
Revenue model
- EU Public Funding via Horizon Europe & Digital Europe Programme: Chips JU receives EU budget contributions through Horizon Europe and the Digital Europe Programme. The EU contribution was increased from €1.8 billion to €4.175 billion, with a grand total budget of nearly €11 billion including private and public (national/regional) co-investments. The JU issues open calls for proposals across both programmes, with EU budgets ranging from €2M to €1.67B per call or initiative.
- Participating State National Contributions: EU Member States and associated countries (Participating States) provide national/regional co-funding that is matched against EU contributions. For the FAMES pilot line, national contributions equal the Chips JU contribution, each at €415 million (total €830M). For most calls, national contributions follow co-financing rates defined in the Single Basic Act.
- Private Member Contributions: The three Private Members — AENEAS, EPoSS, and INSIDE Industry Associations — contribute private industry co-investment as part of the tripartite public-private partnership. This constitutes in-kind contributions from industry stakeholders participating in funded projects.
Go-to-market motion1 record
Distribution channels4 records
Marketing channels10 records
Chips Joint Undertaking product offering
Product offeringCore offering
Chips Joint Undertaking is a European tripartite public-private partnership that funds research and innovation in advanced nano-electronic chip technologies and systems across two pillars: (1) the Chips for Europe Initiative, which funds pilot lines, a European Design Platform, Chips Competence Centres, quantum actions, and skills development; and (2) Electronic Components and Systems Research and Innovation (ECS R&I), which funds development of materials, equipment, technologies, and methods for the EU semiconductor ecosystem. Funding is disbursed through open, competitive calls for proposals published on the Chips JU website and the EU Funding & Tenders Portal, with a total programme budget of nearly €11 billion drawn from EU, national, and private contributions.
Product overview
Chips Joint Undertaking is a European tripartite public-private partnership implementing the Chips for Europe Initiative and continuing Electronic Components and Systems Research and Innovation (ECS R&I) activities. The organisation manages a portfolio of five pilot lines (NanoIC, FAMES, APECS, PIXEurope, and Quantum Pilot Lines), the EU Chips Design Platform, and a network of Chips Competence Centres. Funding is delivered through two programmes: Horizon Europe R&I calls addressing AI hardware, edge computing, cybersecurity, 6G, energy efficiency, advanced packaging, and photonics; and Digital Europe Programme calls for AI compute infrastructure, skills development, and international collaboration. The total budget is nearly €11 billion from EU, national/regional, and private industry contributions.
Differentiator
Problem solved
Functional benefit
Brands
- Chips for Europe Initiative: Part of Chips JU programme supporting technological capacity building through Pilot Lines, Design Platform, Competence Centres, quantum actions and skills development
- Electronic Components and Systems R&I
Products and services
- Chips for Europe Initiative
- Electronic Components and Systems Research and Innovation (ECS R&I)
- NanoIC Pilot Line
- FAMES Pilot Line
- APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)
- PIXEurope Pilot Line (Photonic Integrated Circuits)
- EU Chips Design Platform
- Chips Competence Centres Network
- Quantum Pilot Lines
- Horizon JU Chips R&I Calls
- AI Chip Demonstrators Call (DIGITAL-JU-CHIPS-2026-AI1-SG)
- Skills-Related Calls (Skills Hubs of Excellence, Pilot Federation, Stimulation of Chip Design)
Quantifiable outcome
- Nearly €11 billion total programme budget mobilised for European semiconductor ecosystem
- +6 more outcomes
Companies that use Chips Joint Undertaking
Customer profileNamed customers5 records
Segments5 records
Ideal customer profiles4 records
Chips Joint Undertaking technology and API
TechnologyTechnology focussed No
API detail
- Has API
- No
- API docs
- API detail
Core technology
AI maturity
App detail
Feature4 records
Chips Joint Undertaking partnerships and signals
Strategic signalPartnerships
15 partnerships are on record, tiered flagship, major and core.
- Japan (Japanese Consortia)flagshipChips JU launched a collaborative call with Japan on semiconductors (DIGITAL-JU-Chips-2026-SG-JAPAN), focusing on chiplet ecosystems for AI and advanced process technologies for nodes beyond 2nm. Expected EU contribution per project: €3-5M. This call is presented at the 2nd EU-Japan Digital Foundations Network Symposium (June 2026) and opens on 7 July 2026 with a deadline of 24 September 2026.
- Digital Partnership and TTC Countries (India, Singapore, Taiwan)majorChips JU launched the ECS International Collaboration call (HORIZON-JU-Chips-2026-3-RIA) fostering low-TRL collaboration with India, Singapore, and Taiwan on chip design, manufacturing, and packaging. EU budget: €5M; expected EU contribution per project: €2-2.5M. No co-financing by Participating States under Article 141(2) SBA (100% Horizon Europe funding).
- Republic of Korea — Pilot Federation and Skills-related CallsmajorBeyond the €6M joint projects, Chips JU and Korea are expanding collaboration through additional international calls including joint calls on semiconductor technologies launched in July 2026. The EU-Japan Digital Foundations Network and the broader Digital Partnership framework underpin these collaborations.
- APECS Pilot Line (Advanced Packaging and Heterogeneous Integration)coreAPECS is the Chips JU pilot line on advanced packaging and heterogeneous integration for electronic components and systems. It strengthens innovation across the European value chain by providing an industry-oriented environment for advanced packaging as a key enabling technology for chiplet architectures and heterogeneous integration. Implemented by the Research Fab Microelectronics Germany (FMD).
- PIXEurope Pilot Line (Photonic Integrated Circuits)corePIXEurope is the Chips JU pilot line on advanced photonic integrated circuits, coordinated by ICFO (Institute of Photonic Sciences) and co-funded by Chips JU and participating Member States with support from regional authorities. It aims to accelerate the adoption of integrated photonic chips and strengthen Europe's technological sovereignty in photonics.
- Republic of Korea (National Research Foundation of Korea)flagshipChips JU and the Republic of Korea's National Research Foundation (NRF) co-fund four joint semiconductor projects: ENERGIZE (brain-like circuits using 2D materials for energy-efficient AI), NEHIL (laser-based LIDAR with heterogeneous integration), HAETAE (photonic brain-like chips for adaptable AI), and ViTFOX (visual data processing AI using ferroelectric materials). Total investment: ~€6M from EU and ~€6M from NRF over 3 years. This collaboration follows the EU-ROK Digital Partnership announced in November 2022.
- FAMES Consortium (led by CEA-Leti)coreThe FAMES (FD-SOI, Memories, Sensors) Pilot Line is led by CEA-Leti (France) and brings together 11 consortium members: imec (Belgium), Fraunhofer (Germany), Tyndall (Ireland), VTT (Finland), CEZAMAT WUT (Poland), Université Catholique de Louvain (Belgium), Silicon Austria Lab (Austria), SiNANO Institute (France), Grenoble INP (France), and University of Granada (Spain). The pilot line receives €830 million (€415M from Chips JU, €415M from Participating States). It develops FD-SOI, embedded NVM, RF components, 3D integration, and power management IC technologies.
- NanoIC Pilot Line (hosted by imec)coreNanoIC is the Chips JU pilot line focused on advanced sub-2nm leading-edge system-on-chip (SoC) technology, hosted by imec in Leuven, Belgium. As one of the four selected pilot lines, it supports European industries (automotive, telecommunications, health, etc.) in developing future-proof products leveraging the latest chip innovations. The pilot line is part of the €1.67 billion EU investment matched by national contributions.
- United Kingdom (as Participating State)coreThe United Kingdom joined Chips JU as a Participating State in March 2024, post-Brexit. This allows UK-based organisations to participate in Chips JU funded projects and co-invest in the European semiconductor ecosystem. The UK Technology Minister Saqib Bhatti confirmed the UK's commitment to semiconductor science and research through Chips JU membership.
- AENEAScoreAENEAS is one of three Private Members in the Chips JU tripartite governance structure. As an industry association representing organisations in the European electronic components and systems ecosystem, AENEAS helps shape strategic R&I priorities and ensures alignment with industry needs. AENEAS co-organises the ECS Brokerage Event and other community-building activities with EPoSS and INSIDE.
- EPoSS (European Association on Smart Systems Integration)coreEPoSS is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in smart systems integration and contributes to defining strategic research priorities in areas such as heterogeneous integration, edge AI, and autonomous systems. EPoSS co-organises the ECS Brokerage Event, Annual Forum, and other events with AENEAS and INSIDE.
- INSIDE Industry AssociationcoreINSIDE Industry Association is one of three Private Members in the Chips JU tripartite governance structure. It represents organisations in intelligent digital systems and contributes to Chips JU strategic priority setting. INSIDE co-organises community events including INSIDE Connect, thematic workshops, and the ECS Brokerage Event with AENEAS and EPoSS.
- European CommissioncoreThe European Commission, represented by DG CNECT and DG RTD, provides strategic guidance and public investment to Chips JU as the EU representative in the tripartite governance. The Commission defines the regulatory framework (European Chips Act, Single Basic Act), allocates EU budget through Horizon Europe and the Digital Europe Programme, and participates in programme governance through observer roles and policy oversight.
- Participating States (EU Member States + UK)coreEU Member States and the United Kingdom (as a Participating State since March 2024) provide national/regional co-funding for Chips JU calls and ensure alignment with national semiconductor priorities. They participate in the Public Authorities Board (PAB) and contribute to the governance and strategic direction of the Joint Undertaking. National mirror groups (e.g., Chips Mirror Group Italy) facilitate domestic participation.
- European Chips Competence Centre NetworkmajorChips JU funds a network of Chips Competence Centres across Europe including AT-C³ (Austria), ChipNL CC (Netherlands), LCCC (Latvia), KIIP (Estonia), Chips C2-LT (Lithuania), and others. These centres provide technical expertise, experimentation, design support, and skills training to SMEs and startups, facilitating access to pilot lines and the European design platform. The Austrian AT-C³ offers up to 80% funding rates for SMEs.
Scale indicators20 records
Recent moves7 records
Expansion highlights6 records
Chips Joint Undertaking competitors and assessment
Company assessmentDirect peers
- CHIPS for America (NIST CHIPS Office): US federal implementation body for the CHIPS and Science Act, deploying $52B+ in semiconductor R&D and manufacturing incentives. Direct functional peer to Chips JU as the Western world's other major semiconductor funding instrument, albeit with different governance and funding instruments.
- KIAT (Korea Institute for the Advancement of Technology): South Korea's semiconductor and industrial technology funding agency, implementing Korea's K-Semiconductor Strategy. Direct functional peer to Chips JU as a national PPP-style funding body with active international collaboration including the EU-Korea joint calls.
- ITRI (Industrial Technology Research Institute): Taiwan's government-funded applied research institute with deep semiconductor and electronics R&D capability. Comparable as a publicly-funded R&D organization whose mandate spans the semiconductor value chain and supports national industry competitiveness.
- NEDO (New Energy and Industrial Technology Development Organization): Japan's national R&D funding agency for advanced technology including semiconductors. Functional peer to Chips JU in pooling public-private capital for industrial R&D, with comparable scale programmes under Japan's semiconductor strategy.
- A*STAR (Agency for Science, Technology and Research): Singapore's public-sector R&D agency with semiconductor manufacturing and design capabilities. Peer as a publicly-funded R&D organization active in semiconductor ecosystem building and participating in Chips JU's international collaboration calls.
Broad incumbents
- imec: World-leading independent semiconductor R&D center headquartered in Leuven, Belgium. Hosts the Chips JU NanoIC pilot line and operates broader R&D capabilities (sub-2nm, 3D, photonics) that overlap heavily with Chips JU's funded scope.
- CEA-Leti: France's leading microelectronics RTO, based in Grenoble. Hosts the Chips JU FAMES pilot line (€830M) and operates broader semiconductor R&D and pilot capabilities that parallel Chips JU programme funding scope.
- Fraunhofer Microelectronics (FMD): Germany's Research Fab Microelectronics Germany consortium of Fraunhofer institutes. Implements the Chips JU APECS pilot line on advanced packaging and heterogeneous integration, with broader semiconductor R&D capabilities that overlap with Chips JU programme scope.
Others
- European Innovation Council (EIC): European Commission funding mechanism for deep-tech innovation, including semiconductor startups. Complementary rather than directly competing; shares the SME/startup ecosystem that Chips JU competence centres also serve, with some overlap in chip-design and quantum-chip applicants.
- Clean Hydrogen Joint Undertaking: Sister EU tripartite public-private partnership under Horizon Europe. Structurally identical governance model (EU, Member States, Private Members), providing a benchmark for how EU JUs operate and a structural peer for PPP funding governance, though focused on hydrogen rather than semiconductors.
Market position
Strengths5 records
Weaknesses5 records
Competitive moat5 records
Key risks6 records
Key highlights7 records
Customer concentration
Chips Joint Undertaking social profiles
Digital presenceChips Joint Undertaking financial estimates
Financial estimateRevenue estimate
Valuation estimate
Chips Joint Undertaking leadership team
Management profileNumber of profiles
Profiles5 records
Chips Joint Undertaking funding detail
Funding detailFunding overview
Funding rounds
Investors
Funding detail is available on the Subscription and Enterprise plan.Contact sales →
Chips Joint Undertaking M&A and investment
M&A and investmentM&A
Investments
M&A and investment is available on the Subscription and Enterprise plan.Contact sales →
Frequently asked questions about Chips Joint Undertaking
What does Chips Joint Undertaking do?
Chips Joint Undertaking is a European tripartite public-private partnership that funds research and innovation in advanced nano-electronic chip technologies and systems across two pillars: (1) the Chips for Europe Initiative, which funds pilot lines, a European Design Platform, Chips Competence Centres, quantum actions, and skills development; and (2) Electronic Components and Systems Research and Innovation (ECS R&I), which funds development of materials, equipment, technologies, and methods for the EU semiconductor ecosystem. Funding is disbursed through open, competitive calls for proposals published on the Chips JU website and the EU Funding & Tenders Portal, with a total programme budget of nearly €11 billion drawn from EU, national, and private contributions.
Is Chips Joint Undertaking a public or private company?
Chips Joint Undertaking is a private company. It is classified as state government owned and is currently operating.
When was Chips Joint Undertaking founded?
Chips Joint Undertaking was founded in 2021. It employs 51 to 100 people.
Where is Chips Joint Undertaking based?
Chips Joint Undertaking is headquartered in Brussels, Belgium, in the Europe region.
How does Chips Joint Undertaking make money?
Three revenue lines are on record. EU Public Funding via Horizon Europe & Digital Europe Programme is the primary driver. The others are participating State National Contributions and private Member Contributions.
Who are Chips Joint Undertaking's main competitors?
Direct peers on record are CHIPS for America (NIST CHIPS Office), KIAT (Korea Institute for the Advancement of Technology), ITRI (Industrial Technology Research Institute), NEDO (New Energy and Industrial Technology Development Organization) and A*STAR (Agency for Science, Technology and Research). Broad incumbents are imec, CEA-Leti and Fraunhofer Microelectronics (FMD). Others are European Innovation Council (EIC) and Clean Hydrogen Joint Undertaking.
Does Chips Joint Undertaking have an API?
No public API is recorded for Chips Joint Undertaking.
What industry is Chips Joint Undertaking in?
Chips Joint Undertaking's product category is Semiconductor R&I Public Funding. Its primary akta.pro industry code is HDAHACAJ, Foundry Platform & Design Enablement Services (PDK/DFM/Process Qualification), with a secondary code of HDAHABAC, Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC). Its NAICS code is 5417 and its SIC code is 3674.