What SoC Hub does

SoC Hub is an academic-industry consortium coordinated by Tampere University that co-develops System-on-Chip designs in Tampere, Finland. It was founded in 2019 and officially launched in February 2021 after Business Finland seed grant approval. The initiative unites over 70 daily contributors from Tampere University's Computing Sciences Unit with eight founding industry partners (Nokia as co-coordinator alongside CoreHW, VLSI Solution, Siru Innovations, TTTech Flexibilis, Wapice, Procemex, Cargotec, and later Hiab) to design SoCs for 6G, AI, imaging, and security applications.

The core technology base combines open-source IP (RISC-V cores, Kactus2 IP-XACT tool, OpenASIP for customizable RISC-V processor generation, TCE for TTA DSP, Kvazaar HEVC encoder) with commercial EDA flows from Cadence and Siemens EDA, manufactured at TSMC 22nm Ultra-Low Leakage and packaged with IMEC support. The consortium has delivered three taped-out chips in three years: Ballast (15mm², 2021), Tackle (4mm², November 2022), and Headsail (25mm², 330 million transistors, 2023) with a 4-core 64-bit RISC-V subsystem, Deep-Learning accelerator, and custom partner IP. Adjacent programs include SecureSoC (EUR 6.7M, 2026) for security-by-design and post-quantum cryptography, TRISTAN (46-partner European RISC-V ecosystem, 2022-2025), Edu4Chip (master's level training, 2023), and MIELi (30 doctoral positions, 2024). Tampere University joined the OpenTitan Coalition as an academic partner in August 2026.

SoC Hub operates as a non-profit research consortium. It is not a commercial product company and does not charge for its workshops, webinars, or educational services. Funding flows from Business Finland, the European Regional Development Fund, and the EU's Digital Europe Programme, with industry partners contributing in-kind IP, expertise, and co-funding. Reported headcount is 51-100 employees, drawn from across Tampere University and partner companies. The primary "customers" are the consortium members themselves, with Nokia serving as the dominant anchor for 5G/6G SoC co-creation and the public funders serving as grant anchors.

Name

SoC Hub

Legal name

SoC Hub (System-on-Chip Hub)

Website

https://sochub.fi

Company type

Private

Founded year

2019

Operating status

Operating

Headcount range

51–100 employees

Short description

SoC Hub is a Finnish research consortium coordinated by Tampere University that co-designs System-on-Chip prototypes with industry partners. It has taped out three progressive RISC-V-based SoCs and develops open-source EDA tools, security-by-design chips, and European chip-design education programs.

Ownership category

akta.pro rank

Product category

Semiconductor Design Services

NAICS

Computer Systems Design Services (541512), Computer Systems Design and Related Services (5415), Other Computer Related Services (541519)

SIC

Services-Computer Integrated Systems Design (7373)

akta.pro primary industry

System-on-Chip (SoC) Platforms (Mobile/Consumer/Embedded) (HDAHAJAC)

akta.pro secondary industries

Compute & Acceleration ICs (CPU/GPU/AI/FPGA/ASIC) (HDAHABAC), Audio, Imaging & Multimedia SoCs (ISP/Codec/Display) (HDAHABAH), Networking & Data Center Silicon (Switch/NIC/DPU/SerDes) (HDAHABAB), Real-Time & Industrial Control Processors (RT MCUs/PLC-class SoCs) (HDAHAJAL)

Keywords

• System-on-chip design
• RISC-V processors
• Semiconductor research
• Chip prototyping
• Microelectronics education

Headquarters

HQ city

Tampere

HQ country

Finland

HQ region

Europe

Offices1 record

Markets served

GTM type

B2B

Offering type

Services

Cost components

Personnel, Technology or R&D, Infrastructure, Operations, Marketing or Sales

Revenue model

1. Co-innovation / Research Project Funding: SoC Hub is a non-profit ecosystem initiative primarily funded by Business Finland and European Regional Development Fund. Companies contribute as consortium members, co-funding projects and providing in-kind expertise. Revenue is not commercial; it is grant-based research funding for ecosystem development, SoC prototyping, and education.

Go-to-market motion1 record

Distribution channels1 record

Marketing channels8 records

Core offering

SoC Hub is a Finnish academic-industry consortium coordinated by Tampere University that co-designs System-on-Chip prototypes for 6G, AI, imaging, and security applications. The initiative brings together over 70 experts to develop reusable chip architecture templates, tape out yearly SoCs at TSMC on the 22nm Ultra Low Leakage process, and provide open-source design tools (Kactus2, OpenASIP, TCE) and education programs to build Finnish and European microelectronics competence.

Product overview

SoC Hub is a Finnish research consortium ecosystem (not a commercial product company) focused on System-on-Chip design co-development between Tampere University and industry partners. The core offering consists of prototype SoCs developed through yearly tape-out cycles: Ballast (first-generation 15mm² chip with RISC-V, DSP, AI accelerator), Tackle (second-generation 4mm² chip with enhanced connectivity IPs), and Headsail (flagship 330M transistor chip with 4-core RISC-V and Deep-Learning accelerator). The ecosystem also provides open-source design tools including Kactus2 (IP-XACT-based design automation) and OpenASIP (customized RISC-V processor generation). Supporting infrastructure includes the Granite development board and comprehensive education services through the Edu4Chip master's programme and MIELi doctoral school. The SecureSoC and TRISTAN projects extend the ecosystem into secure chip technologies and European RISC-V development.

Differentiator

Problem solved

Functional benefit

Products and services

• Headsail System-on-Chip Flagship SoC developed by SoC Hub containing 330 million transistors with a 4-core 64-bit RISC-V sub-system, Deep-Learning accelerator, and partner-specific IP, manufactured at TSMC with a custom 624-pin BGA package for AI and high-performance computing applications.
• Tackle System-on-Chip Second-generation SoC in the SoC Hub series with 4 mm² die area on TSMC 22nm Ultra-Low Leakage technology, featuring Ibex RISC-V core, programmable DMA controller, high-speed SerDes datalink, and SDRAM memory controller in two variants.
• Ballast System-on-Chip First System-on-Chip by the SoC Hub consortium, a 15 mm² chip manufactured by TSMC using 22nm Ultra Low Leakage process for IoT and edge devices, featuring multiple RISC-V CPU cores, Digital Signal Processor, AI accelerator, sensor interfaces, and FPGA extension interface.
• Kactus2 IP-XACT Tool Open-source IP-XACT tool environment developed by Tampere University, the most widely used open-source IEEE 1685 IP-XACT tool for intellectual property exchange in SoC design, used by hundreds of companies and managing different RISC-V configurations with clear interfaces for integration work.
• OpenASIP Toolset Open-source application-specific instruction-set processor tool flow for designing software programmable co-processors for SoC Hub chips to accelerate AI, audio, and image signal processing tasks; version 2.0 enables customized RISC-V processor generation.
• TCE (TTA-based Co-design Toolset) Open-source toolset for designing, generating, programming, and verifying the Digital Signal Processing subsystem based on Transport Triggered Architecture used in SoC Hub chips.
• Chip Implementation Course University course covering ASIC synthesis, physical design, standard cell technologies, and ASIC sign-off tools, delivered as part of the European Edu4Chip project to prepare students for chip design industry careers.
• Edu4Chip Master's Programme European master's study programme with nine partners covering complete chip design flow from high-level hardware description to tape-out and testing, aimed at training more than 150 European students per year for chip design careers as part of EU Chips Act activities.
• MIELi Microelectronics Doctoral School Finnish microelectronics doctoral school pilot offering 30 doctoral positions across Aalto University, Tampere University, University of Oulu, and VTT, aiming to graduate doctoral students in three years with industrially relevant research topics and immediate industry employment.
• Granite Development Board Custom PCB development kit for the Ballast chip, enabling testing, prototyping, and demonstration applications for consortium partners and researchers.

Quantifiable outcome

• Three SoCs taped out in three years (Ballast, Tackle, Headsail) with 330 million transistors on the most complex chip, demonstrating rapid SoC development capability.
• +4 more outcomes

Named customers11 records

Segments3 records

Ideal customer profiles3 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

AI capability3 records

Feature6 records

Partnerships

22 partnerships are on record, tiered core and major.

• NokiacoreStrategic or Co-development Partner · 1 January 2020Nokia is the co-coordinator of SoC Hub alongside Tampere University and serves as the main industry partner. Nokia invests heavily in SoC development in Finland, with Tampere being a key System-on-Chip location for Nokia. The company contributes SoC development expertise, particularly for 5G applications, and leads the SoC design co-creation with consortium partners. Nokia also participates in the TRISTAN European RISC-V ecosystem project.
• CoreHWcoreStrategic or Co-development PartnerCoreHW is a founding partner of the SoC Hub consortium, contributing to the co-development of System-on-Chip designs alongside Tampere University and other partner companies.
• VLSI SolutioncoreStrategic or Co-development PartnerVLSI Solution is a founding partner contributing specialist expertise in compact SoC design and RISC-V-based processing. Within the SecureSoC project, VLSI Solution leverages expertise for next-generation secure, network-connected SoCs and customer-specific solutions. Also participates in the TRISTAN European project.
• Siru InnovationscoreStrategic or Co-development PartnerSiru Innovations is a founding partner of the SoC Hub consortium, contributing to SoC co-development activities.
• TTTech FlexibiliscoreStrategic or Co-development PartnerTTTech Flexibilis is a founding partner contributing to the SoC Hub consortium. Also participates in the SecureSoC project for security-by-design SoC development.
• ProcemexcoreStrategic or Co-development PartnerProcemex is a founding partner contributing to SoC Hub's industrial imaging and machine vision applications.
• WapicecoreStrategic or Co-development PartnerWapice is a founding partner contributing software development and system-level design expertise. Within the SecureSoC project, Wapice develops next-generation quantum-secure cybersecurity solutions to protect edge devices and their software.
• CargoteccoreStrategic or Co-development PartnerCargotec is a founding partner of the SoC Hub consortium. The company focuses on autonomous heavy machine applications requiring advanced ML algorithms, sensor data transmission, and real-time safety-critical operation. Also participates in the TRISTAN European RISC-V ecosystem project.
• HiabcoreStrategic or Co-development PartnerHiab is a project partner contributing to the Business Finland co-innovation project focused on industrial applications.
• InstacoreStrategic or Co-development PartnerInsta is an industry partner in the SecureSoC project, contributing to the development of domestically produced high-assurance hardware-based systems with security extending across the entire supply chain.
• XipheracoreStrategic or Co-development PartnerXiphera is an industry partner in the SecureSoC project, integrating hardware-based cybersecurity and cryptographic IP solutions into next-generation Finnish semiconductor architectures.
• VTT (Technical Research Centre of Finland)majorStrategic or Co-development PartnerVTT is a key player in the MIELi microelectronics doctoral school pilot, offering visiting researcher positions, research infrastructures, and guidance alongside Aalto University, Tampere University, and University of Oulu.
• Aalto UniversitymajorStrategic or Co-development PartnerAalto University is one of Finland's key players in microelectronics research and a partner in the MIELi microelectronics doctoral school pilot, offering doctoral positions and education.
• University of OulumajorStrategic or Co-development PartnerUniversity of Oulu is one of Finland's key players in microelectronics research and a partner in the MIELi microelectronics doctoral school pilot, offering doctoral positions and education.
• IMECmajorImplementation/ SI/ Consulting PartnerIMEC is a Belgian R&D hub for nano and digital technologies that partners with TSMC for chip manufacturing in Europe and provides packaging services for SoC Hub chips. IMEC also supports the MIELi doctoral school pilot with research infrastructures and guidance.
• TSMCmajorTechnology or IntegrationTSMC (Taiwan Semiconductor Manufacturing Company) is the world's leading semiconductor manufacturer, contracted to fabricate SoC Hub chips at advanced technology nodes (22nm Ultra Low Leakage, and subsequent nodes).
• OpenTitan CoalitionmajorStrategic or Co-development PartnerOpenTitan is the world's first open-source silicon Root of Trust project. Tampere University joined as an academic partner contributing hardware security, RISC-V architecture, and cryptographic acceleration expertise. SecureSoC is the first SoC Hub initiative with close collaboration with OpenTitan as an official research partner.
• TRISTAN Project ConsortiummajorStrategic or Co-development PartnerTRISTAN is a 3-year European project (December 2022 - December 2025) with 46 partners from industry, research organizations, universities, and RISC-V industry associations across Europe. The project aims to develop and industrialize the European RISC-V ecosystem. SoC Hub became part of the most significant European RISC-V developer consortium. Finnish partners include Nokia, VLSI Solution, and Cargotec alongside Tampere University. Funded under EU Digital Europe Programme.
• Edu4Chip ConsortiummajorStrategic or Co-development PartnerEdu4Chip (Joint Education for Advanced Chip Design in Europe) is a European education project funded by the EU Digital Europe Programme, with nine partners including Tampere University, Technical University of Munich, Technical University of Denmark, KTH Royal Institute of Technology, Institut Mines-Telecom, Fraunhofer, and SME partners MINRES Technologies, Logiq Works, and SyoSil Aps. Aims to train more than 150 European students per year for chip design careers.
• Cadence Design SystemsmajorTechnology or IntegrationCadence Design Systems provides EDA tools (Genus Synthesis Solution, Virtuoso Digital Implementation, Innovus) used for designing SoC Hub chips. SoC Hub uses Cadence tools for its complete ASIC design flow from RTL to GDSII. Cadence has provided webinars and training on their tools through SoC Hub.
• EuropracticemajorTechnology or IntegrationEuropractice provides cloud-based design environments and access to ASIC technologies and tools for SoC Hub and its workshop participants.
• Siemens EDAmajorTechnology or IntegrationSiemens EDA (through Catapult High-Level Synthesis) partners with SoC Hub to deliver workshops on accelerating imaging algorithms using HLS. Dr. Panu Sjövall from Tampere University's Ultra Video Group presented at Siemens EDA webinars.

Scale indicators8 records

Recent moves6 records

Expansion highlights6 records

Direct peers

• IMEC: Belgium-based global R&D hub for nano and digital technologies that runs advanced semiconductor research programs in partnership with universities and industry. Highly comparable to SoC Hub as a non-commercial, grant-and-partner-funded research consortium producing chip prototypes and training talent; IMEC also partners with TSMC for chip manufacturing in Europe and supports MIELi doctoral positions.
• CEA-Leti: French government-funded microelectronics research institute that designs advanced ICs and prototypes in collaboration with industry partners. Comparable to SoC Hub as a European publicly-funded SoC/IC design ecosystem that delivers tape-outs, IP blocks, and trains engineers, although with a much broader scope and bigger budget.
• Fraunhofer Institute for Microelectronic Circuits and Systems (IMS): German applied-research institute operating fabless ASIC design services, mixed-signal and SoC development for industry partners. Directly comparable as a European publicly-funded research organization delivering SoC design services, tape-outs and IP, partnered with TSMC foundries; also participates in EU Chips Act initiatives like Edu4Chip.

Emerging players

• SiFive: US-based commercial leader in RISC-V IP cores and SoC development platforms. Comparable as a RISC-V ecosystem player with a similar chip-design platform philosophy, but operating as a venture-backed commercial company rather than an academic consortium; potential downstream partner or competitor for SoC Hub's RISC-V work.
• Andes Technology: Taiwan-based supplier of RISC-V and proprietary processor IP for embedded SoCs. Comparable as a RISC-V IP / SoC platform provider targeting similar applications (edge AI, IoT,6G-adjacent), but commercially focused rather than consortium-based.

Others

• OpenHW Group: Global not-for-profit organization hosting the OpenHW Group CORE-V family of open-source RISC-V cores and SoC reference platforms. Thematically comparable as a collaborative RISC-V ecosystem initiative producing open IP for SoCs; complementary to SoC Hub's RISC-V-based chip development, particularly given Tampere's OpenTitan Coalition membership.
• VTT Technical Research Centre of Finland: Finland's state-owned applied research organization and a direct national partner in the MIELi doctoral pilot alongside SoC Hub. Comparable as a publicly-funded microelectronics research partner; collaborates rather than competes with SoC Hub on the Finnish semiconductor ecosystem.

Broad incumbents

• Cadence Design Systems: Global EDA tools and semiconductor IP vendor. SoC Hub uses Cadence Genus, Virtuoso and Innovus for its complete ASIC design flow, and Cadence provides training/webinars. Comparable as an incumbent participant in the same SoC design ecosystem, though operating as a commercial vendor rather than a co-creation partner.
• Synopsys: Largest EDA vendor and major supplier of pre-designed semiconductor IP including RISC-V cores (ARC). Comparable as an incumbent supplier in the SoC design stack that SoC Hub builds upon, with overlapping RISC-V and AI accelerator IP offerings.

Regional players

• CSEM: Swiss public-private R&D center for microelectronics, MEMS and ultra-low-power IC design. Comparable as a European public-funded research organization delivering SoC and IC prototyping for industry partners, but focused on Switzerland rather than Finland.

Market position

Strengths4 records

Weaknesses4 records

Competitive moat6 records

Key risks5 records

Key highlights6 records

Customer concentration

• LinkedInlinkedin.com/company/soc-hub

Revenue estimate

Valuation estimate

Number of profiles

Profiles4 records

Funding overview

Funding rounds

Investors

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M&A

Investments

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Frequently asked questions about SoC Hub