What JEDEC does

JEDEC Solid State Technology Association is a global, ANSI-accredited standards development organization founded in 1958 (with roots in predecessor bodies dating to 1924) and headquartered in Arlington, Virginia. JEDEC develops open standards for the microelectronics industry through a consensus-based consortia model in which member companies contribute engineering talent to 50+ committees and subcommittees. Its standards portfolio spans main memory (DDR5 SDRAM, HBM4, GDDR7), low-power memory (LPDDR6, LPDDR5/5X), flash storage (UFS 5.0, e.MMC, xSPI), memory modules (MRDIMM, SOCAMM2), wide bandgap power semiconductors (SiC, GaN), chiplet integration (JEP30 PartModel), interconnect (CXL), packaging outlines (JEP95), and quality/reliability test methods. Notable technical work includes the HBM4 standard (JESD270-4) enabling up to 2 TB/s bandwidth and 512 GB capacity per device, the UFS 5.0 standard (JESD220H) at 10.8 GB/s, and the JEP30 PartModel guidelines now being merged with the Open Compute Project's CDXML for chiplet ecosystem standardization.

JEDEC operates a non-profit, member-driven business model governed by a 'one company, one vote' Board of Directors. Revenue is generated primarily through tiered annual membership dues ($7,195 for one committee up to $21,588 for four or more committees, with a 50% first-year discount for new members), one-time fees for Standard Manufacturer's ID Codes ($750) and Low Power Memory ID Codes ($500), and hard-copy publication sales through authorized resellers. Most published standards are free to download after registration, which maximizes adoption and ecosystem entrenchment rather than direct document revenue. The organization serves more than 380 member companies worldwide, with over 3,000 volunteer engineers participating in standards development, and is the only ANSI-accredited body covering this breadth of the semiconductor ecosystem.

JEDEC's customers and members span the full semiconductor value chain: memory manufacturers (Samsung, SK hynix, Micron, Kioxia), system integrators and OEMs (Intel, NVIDIA, AMD, HPE, MediaTek), power semiconductor players (Wolfspeed, Infineon), and equipment/EDA suppliers (Siemens EDA, Cadence, Amkor, ASE). Distribution is global, with active members in the USA, Korea, China, Japan, Germany, and Taiwan, and committee meetings and forums held in technology centers including Arlington, San Jose, Seoul, San Diego, Waikoloa, and Copenhagen. Standards are cited in product specifications, government procurement documents, and test methodologies worldwide, making JEDEC a foundational infrastructure layer for the microelectronics industry.

Name

JEDEC

Legal name

JEDEC Solid State Technology Association

Website

https://jedec.org

Company type

Private

Founded year

1958

Operating status

Operating

Headcount range

1–10 employees

Short description

JEDEC Solid State Technology Association is a global, ANSI-accredited non-profit standards body that develops open consensus standards for the microelectronics industry. It serves 380+ member companies across memory, storage, packaging, and power semiconductors through 50+ committees powered by 3,000+ volunteer engineers.

Ownership category

akta.pro rank

Product category

Semiconductor Industry Standards Development

NAICS

Semiconductor and Other Electronic Component Manufacturing (3344)

SIC

Semiconductors & Related Devices (3674)

akta.pro primary industry

Standards Development & Publishing (SDOs, Technical Standards) (MPAJACAB)

Keywords

• Semiconductor standards development
• Memory interface standards
• Microelectronics industry standards
• DRAM module specifications
• Wide bandgap power standards

Headquarters

HQ city

Arlington

HQ country

United States

HQ region

North America

Offices1 record

Markets served

GTM type

B2B

Offering type

Services

Cost components

Personnel, Operations, Marketing or Sales, Technology or R&D

Revenue model

1. Membership Dues: Annual membership fees based on number of committees selected. Dues range from $7,195 (one committee) to $21,588 (four or more committees). New members receive 50% first-year discount.
2. Standards Document Sales: Most published standards are free for members and non-members after registration. Selected standards are only available to non-members for a fee.
3. Manufacturer ID Codes: Standard Manufacturer's ID Codes sold for $750 one-time fee. Low Power Memory ID codes sold for $500 each. Both delivered via email within 10 business days.
4. Hard Copy Publications: Hard copies of standards and publications available for purchase through authorized resellers. Annual updating subscriptions also offered.

Pricing tiers

Go-to-market motion2 records

Distribution channels3 records

Marketing channels7 records

Core offering

JEDEC Solid State Technology Association develops and publishes open, consensus-based technical standards for the microelectronics industry. Its portfolio covers semiconductor memory (DDR5, HBM4, LPDDR6, GDDR7), embedded and flash storage (UFS 5.0, e.MMC, xSPI), memory modules (SOCAMM2, MRDIMM), chiplet integration (JEP30 PartModel), wide bandgap power semiconductors (SiC, GaN), packaging outlines (JEP95), and quality/reliability test methods. Standards are produced by 50+ committees and subcommittees with 3,000+ volunteers and published as JESD, JEP, and MO documents.

Product overview

JEDEC Solid State Technology Association is a global standards organization (not a product company) that develops open standards for the microelectronics industry. Their portfolio consists of semiconductor memory standards (DDR5, HBM4, LPDDR6, UFS 5.0, GDDR7), memory module standards (SOCAMM2, MRDIMM, CAMM2), wide bandgap power semiconductor guidelines (SiC, GaN), chiplet integration standards (JEP30 Part Model), and Compute Express Link (CXL) memory standards. These standards are developed through various committees (JC-11, JC-14, JC-42, JC-45, JC-70, etc.) and enable interoperability across the semiconductor ecosystem from components to packaging and test methods. The standards are published as JESD (JEDEC Standards), JEP (JEDEC Publications), and MO- (Microelectronic Outlines) documents available for free download with registration.

Differentiator

Problem solved

Functional benefit

Products and services

• DDR5 SDRAM Standard (JESD79-5) Specification for next-generation synchronous dynamic random access memory with improved reliability, security, and enhanced performance for servers, AI, and machine learning applications.
• HBM4 DRAM Standard (JESD270-4) High Bandwidth Memory 4 standard enabling up to 2 TB/s bandwidth per device and 512 GB total capacity in an 8-device package, designed for AI and high-performance computing applications.
• LPDDR6 Standard (JESD209-6) Low Power DDR6 standard designed to significantly boost memory speed and efficiency for mobile devices and AI data center applications, with enhanced performance, power efficiency, and security.
• UFS 5.0 Standard (JESD220H) Universal Flash Storage Version 5.0 standard delivering sequential read/write speeds up to 10.8 GB/s with enhanced signal integrity, improved power integrity, and advanced data protection for mobile, automotive, computing, and AI applications.
• SPHBM4 DRAM Standard (JESD330-4) Standard Package High Bandwidth Memory 4 enabling HBM4-class performance through a narrower 512-bit interface with 4:1 serialization, allowing assembly in standard organic substrates at reduced costs.
• SOCAMM2 Module Standard (JESD328) LPDDR5/5X Small Outline Compression Attached Memory Module 2 common standard for datacenter and AI server applications, delivering more than twice the bandwidth of traditional RDIMM while consuming over 55% less power.
• MRDIMM Standard Multiplexed Rank Dual Inline Memory Module standard using multiplexing technology to double data transfer per memory channel while maintaining DDR5 interface compatibility, targeting 12,800 MT/s for AI and data center workloads.
• GDDR7 SGRAM Standard (JESD239) Graphics Double Data Rate 7 Synchronous Graphics Random Access Memory specification for graphics applications.
• SiC Guidelines (JEP203, JEP204) Silicon Carbide reliability guidelines providing shared evaluation framework for short-circuit capability testing and comprehensive catalog of stress procedures for SiC power devices in EV inverters, industrial drives, and energy infrastructure.
• GaN Test Method (JEP182) Test Method for Continuous-Switching Evaluation of Gallium Nitride Power Conversion Devices for use in GaN power semiconductor industries.
• JEP30 Part Model Guidelines XML requirements for exchanging part data between manufacturers and customers, enabling standardized chiplet descriptions and automation of System in Package design and assembly.
• CXL Memory Standards (JESD317, JESD319, JESD325) Compute Express Link memory module, controller, and device management standards for high-speed CPU-to-device and CPU-to-memory interconnect.
• xSPI Standard (JESD251) eXpanded Serial Peripheral Interface specification for nonvolatile memory devices providing high data throughput, low signal count, and limited backward compatibility with legacy SPI devices.
• Standard Manufacturer's ID Code (JEP106) Standard Manufacturer's ID Code assignment and maintenance service, required for DDR family memory modules; sold for $750 one-time fee per code.
• Low Power Memory ID Code Low Power Memory ID Code for LPDDR, LPDDR2-6, Wide-IO, Wide-IO2 technologies; sold for $500 per code.
• JEDEC Membership Program Annual membership program providing participating companies with voting rights in committee standards development, free access to published standards, pre-publication materials, and competitive intelligence on industry roadmaps; tiered pricing by number of committees joined.

Quantifiable outcome

• Standards enabled markets for PCs, servers, smartphones, automotive electronics, and HDTV through standardization of memory interfaces
• +1 more outcomes

Named customers10 records

Segments4 records

Ideal customer profiles4 records

Technology focussed No

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature7 records

Partnerships

Eleven partnerships are on record, tiered flagship, core and minor.

• Open Compute Project (OCP) FoundationflagshipStrategic or Co-development Partner · 1 December 2025Groundbreaking collaboration merging OCP's Chiplet Data Extensible Markup Language (CDXML) into JEP30 PartModel guidelines. Enables standardized chiplet part descriptions for electronic design automation and opens door to automating SiP design using chiplets. The OCP Chiplet Marketplace launched as a catalog for standardized chiplets.
• SAE InternationalcoreStrategic or Co-development Partner · 1 July 2021Standards Cooperation Agreement for Microelectronic Use in Aviation, Space and Defense. Coordinates standards development for aerospace and defense applications.
• Siemens EDAcoreTechnology or IntegrationContributing to 3DK (3D Chip Stack Design Kits) collaborative suite including Assembly Design Kits, Test Design Kits, and Material Design Kits for chiplet standardization.
• Amkor TechnologycoreTechnology or IntegrationActively implementing chiplet standards and contributing to 3DK design kits for standardized multi-chiplet system design and packaging.
• ASE GroupcoreTechnology or IntegrationContributing to chiplet packaging standards and implementing new standards for system-in-package assembly, testing, and validation.
• Cadence Design SystemscoreTechnology or IntegrationActively contributing to and implementing chiplet standards including EDA tool integration with JEP30 PartModel guidelines.
• IPCcoreStrategic or Co-development PartnerCollaborated on lead-free manufacturing standards (J-STD-020, J-STD-033) and quality/reliability standards for surface mount devices.
• iNEMI (International Electronics Manufacturing Initiative)minorStrategic or Co-development PartnerCollaborated on lead-free migration and other industry-wide manufacturing challenges.
• ANSI (American National Standards Institute)coreOthersJEDEC is accredited by ANSI as an official standards development organization.
• IEC (International Electrotechnical Commission)coreOthersMaintains formal liaison relationship for international standards coordination.
• NASA and DSCC (Defense Supply Center Columbus)coreOthersGovernment liaison relationships for space and defense electronics standardization.

Scale indicators5 records

Recent moves6 records

Expansion highlights6 records

Direct peers

• International Electrotechnical Commission (IEC): IEC is the leading international standards body for electrotechnology and is a formal liaison partner of JEDEC. It is directly comparable as a global, consensus-based SDO whose standards are referenced in regulatory and procurement frameworks worldwide.
• IEEE Standards Association (IEEE SA): IEEE SA is a parallel global standards development organization covering electrical, electronic, and computing technologies. It is the most direct functional peer to JEDEC in operating industry-led, consensus-based standards committees with broad corporate membership.
• IPC (Association Connecting Electronics Industries): IPC is a direct peer in microelectronics standards, particularly for assembly, printed board, and lead-free manufacturing (J-STD-020, J-STD-033 are co-developed with JEDEC). It serves an overlapping membership of electronics manufacturers and OEMs.
• SAE International: SAE is a global standards organization with deep overlap in automotive, aerospace, and defense electronics — areas where JEDEC has formal cooperation agreements (e.g., the 2021 SAE–JEDEC standards cooperation agreement for microelectronics in aviation, space, and defense).
• USB Implementers Forum (USB-IF): USB-IF is a focused, industry-led SDO that — like JEDEC — depends on a small staff, a one-company-one-vote governance model, and member dues to maintain globally adopted interface specifications. It is a useful structural and operational peer even though the technical scope is narrower.
• iNEMI (International Electronics Manufacturing Initiative): iNEMI is a peer consortium focused on manufacturing-process standardization across the electronics supply chain, with overlapping membership and a joint history with JEDEC on lead-free migration. Its industry-initiative model is structurally similar to JEDEC's committee model.
• Open Compute Project (OCP) Foundation: OCP is a directly comparable open, member-driven standards/community organization driving specifications in data center hardware. JEDEC's flagship 2025 partnership to merge OCP's CDXML into JEP30 highlights how closely the two organizations are evolving into complementary — and at times competing — standards bodies.

Others

• JEDEC Solid State Technology Association: Listed only for completeness; not a peer.

Emerging players

• RISC-V International: RISC-V International is a younger, open-standards organization that has rapidly built a global, vendor-neutral specification community. It is a comparable model for an emerging SDO that competes for member mindshare in the same semiconductor ecosystem JEDEC serves.

Broad incumbents

• International Organization for Standardization (ISO): ISO is the broadest global SDO and the institutional incumbent against which specialized bodies like JEDEC are benchmarked. It is comparable as a peer only in the sense of operating a global, member-driven standards apparatus — its direct technical overlap with JEDEC is limited.

Market position

Strengths4 records

Weaknesses4 records

Competitive moat5 records

Key risks5 records

Key highlights6 records

Customer concentration

• Xx.com/jedec
• LinkedInlinkedin.com/company/jedec-solid-state-technology-association

Revenue estimate

Valuation estimate

Number of profiles

Profiles8 records

Funding overview

Funding rounds

Investors

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about JEDEC