What lowRISC does

lowRISC is a non-profit Community Interest Company (CIC) founded in 2014 at the University of Cambridge, with engineering operations in Cambridge, UK and Zurich, Switzerland. It stewards commercially viable open-source silicon through three flagship technology programs: the OpenTitan hardware root of trust (the world's first open-source silicon RoT, shipped in production Google Chromebooks and datacenters via Nuvoton from 2025–2026), the Ibex 32-bit RISC-V CPU core, and the CHERI-Mocha memory-safe secure enclave compute subsystem developed under the UK government-backed COSMIC project.

Its core technology is built in SystemVerilog and includes security-hardened IP blocks (AES with DOM masking, KMAC, HMAC, CSRNG, OTBN coprocessor, post-quantum cryptography accelerators), dual-core locked-step configurations with Enhanced Physical Memory Protection, and proprietary pre-silicon verification flows for side-channel analysis (CocoAlma, PROLEAD) and fault injection (SYNFI). The Ibex CPU achieves a minimum 15 kGate area footprint at 3.13 CoreMarks/MHz. The company's wholly-owned NewAE subsidiary provides commercial ChipWhisperer and ChipShouter hardware security testing tools.

The business model is diversified across five revenue streams: OpenTitan membership fees (Silver, Bronze and higher tiers, billed annually), engineering consultancy contracts (project-based and time-and-materials for clients including Google, Rivos, Microsoft, and UK government), paid technical support subscriptions (pre-committed senior engineer hours via multi-year contracts), UK government grants (UKRI, DSIT, Innovate UK for Sunburst and COSMIC projects), and long-term philanthropic/strategic support (notably Google). The company serves silicon vendors, OEMs, cloud/data center operators, and security-conscious enterprises via a partnership-driven model rather than traditional field sales; pricing is quote-based and not publicly disclosed, with the exception of the Sonata FPGA development board sold through Mouser at approximately $200–300.

Name

lowRISC

Legal name

lowRISC Community Interest Company

Website

https://lowrisc.org

Company type

Private

Founded year

2014

Operating status

Operating

Headcount range

1–10 employees

Short description

lowRISC is a Cambridge-based non-profit CIC that stewards open-source RISC-V silicon IP, including the OpenTitan root of trust (shipping in Google Chromebooks), the Ibex CPU core, and the CHERI-Mocha secure enclave, serving silicon vendors, OEMs, and cloud enterprises through membership fees, engineering consultancy, government grants, and technical support.

Ownership category

akta.pro rank

Product category

Open-Source Silicon IP

NAICS

Bare Printed Circuit Board Manufacturing (334412), Computer Systems Design and Related Services (5415)

akta.pro primary industry

Security & Trusted Hardware ICs (Secure Element/TPM/Crypto) (HDAHABAF)

Keywords

• Open-source silicon IP
• RISC-V processor cores
• Hardware root of trust
• Secure silicon design
• Silicon project stewardship

Headquarters

HQ city

Cambridge

HQ country

United Kingdom

HQ region

Europe

Offices2 records

Markets served

GTM type

B2B

Offering type

Software

Cost components

Personnel, Technology or R&D, Operations, Infrastructure

Revenue model

1. OpenTitan Membership Fees: Annual membership fees from open-source projects including Silver, Bronze, and other tiers. Provides access to internal deliverables, expertise, and governance participation. Lower tiers introduced to reduce barrier to entry for broader range of organisations.
2. Engineering Consultancy: Contracts for specific engineering work in open-source projects like OpenTitan, Caliptra, and QEMU. Takes multiple forms including project-based deliverables, time and materials, and both open and embargoed development. Revenue from corporations and governments wanting new designs in the open.
3. Technical Support: Paid-for technical support on usage and integration of products like Ibex CPU and OpenTitan root of trust. Typically involves access to senior engineers for pre-committed hours via video calls and written answers.
4. Government Grants: Funding from government bodies like UKRI for engineering projects including Sunburst and COSMIC. These grants support foundational development of open-source silicon technology.
5. Long-term Strategic Support: Philanthropic and strategic partner support, such as from Google, providing foundational funding for project stewardship and open-source silicon ecosystem development.

Pricing tiers

Go-to-market motion2 records

Distribution channels4 records

Marketing channels6 records

Core offering

lowRISC stewards open-source RISC-V based silicon IP projects, including the Ibex CPU core, the OpenTitan hardware root of trust, and the CHERI-Mocha memory-safe secure enclave. It sells membership access to these projects, performs contract engineering consultancy, and offers paid technical support. Revenue is supplemented by government grants and philanthropic/strategic partner support.

Differentiator

Problem solved

Functional benefit

Brands

• OpenTitan: The world's first open-source silicon root of trust, a complete hardware root of trust design available under Apache 2.0 license, shipping in commercial products from Google and others.
• Ibex
• Sonata
• CHERI-Mocha

Products and services

• Ibex CPU Production-quality open-source 32-bit RISC-V CPU core written in SystemVerilog, featuring low power consumption, small area footprint (15 kGates minimum), predictable performance, dual-core locked-step configuration, and security hardening including Enhanced Physical Memory Protection (ePMP), low-latency memory scrambling, data independent timing, and dummy instruction insertion. Targets embedded controllers, IoT, and SoCs needing a compact, hardened RISC-V core.
• OpenTitan Root of Trust World's first open-source silicon hardware root of trust, available under Apache 2.0. Includes the Ibex CPU, security IP (AES, HMAC, KMAC, CSRNG, OTBN), lifecycle manager, and alert handler. Available as a discrete SoC (Earl Grey) or as an integratable subsystem (Darjeeling) for embedding in other chips. Hardened against SCA and FI attacks, designed for FIPS and Common Criteria certification, with a roadmap for full post-quantum cryptography. For silicon vendors, OEMs, and cloud providers building secure boot, key management, and device identity.
• CHERI-Mocha Secure Enclave Open-source CHERI-enabled secure enclave design under the COSMIC project, combining a 64-bit Linux-capable CVA6-CHERI processor with OpenTitan security components. Delivers hardware-enforced memory safety and compartmentalisation for application-class SoCs, with dual-core locked-step configuration and commercial-standard verification. For silicon designers and government-funded programmes building memory-safe compute subsystems.
• Sonata FPGA Platform Open-source FPGA development platform for evaluating CHERIoT-Ibex and its memory-safety capabilities. Includes PCB design and FPGA RTL available under open licence, with hardware also purchasable through Mouser Electronics for around $200-300. Targets embedded developers and researchers prototyping CHERI-based memory-safe designs.
• Engineering Consultancy

Quantifiable outcome

• OpenTitan Earl Grey chips shipping in Google Chromebooks and datacenters
• +3 more outcomes

Named customers3 records

Segments4 records

Ideal customer profiles3 records

Technology focussed Yes

API detail

Has API

No

API docs

API detail

Core technology

AI maturity

App detail

Feature6 records

Partnerships

Twelve partnerships are on record, tiered core and flagship.

• Fraunhofer AISECcoreStrategic or Co-development Partner · 9 June 2026Joined OpenTitan as official Security Testing Partner. Brings Common Criteria-certified Hardware Security Lab for side-channel analysis, fault injection testing, and secure boot verification. Previously evaluated OpenTitan engineering and production silicon.
• Realtek Semiconductor Corp.coreStrategic or Co-development Partner · 8 June 2026Joined OpenTitan coalition to develop discrete hardware root of trust devices. Global IC provider for networking, multimedia, and IoT applications. Aims to leverage OpenTitan for transparent hardware security across product portfolio.
• Capabilities LimitedcoreStrategic or Co-development Partner · 12 November 2025COSMIC project partner alongside lowRISC, funded by UK government. Collaborating on development of CHERI-Mocha secure enclave design combining CVA6-CHERI with OpenTitan components.
• NewAE TechnologycoreStrategic or Co-development Partner · 2 June 2022Acquired by lowRISC to enhance OpenTitan security testing capabilities. NewAE is a wholly-owned subsidiary creating ChipWhisperer and ChipShouter tools for side-channel and fault injection testing. Brings world-class hardware security expertise and commercially available security analysis tools.
• GoogleflagshipStrategic or Co-development PartnerFounding member and strategic partner of OpenTitan project. Joined lowRISC board. Deploying OpenTitan silicon in Chromebooks and datacenters. Provides long-term foundational support and engineering resources.
• Nuvoton Technology CorporationflagshipOEM/ Whitelabel/ Licensing PartnerManufacturing discrete OpenTitan Earl Grey chips for Google Chromebooks and enterprise server products. First commercial chip built on OpenTitan design. Historic strategic partner with decade-long relationship supplying embedded controllers to Google.
• Western DigitalcoreStrategic or Co-development PartnerFounding member of OpenTitan project. Contributing to open-source silicon root of trust development for storage and data center applications.
• SeagatecoreStrategic or Co-development PartnerOpenTitan project founding member and partner. Collaborating on open-source silicon security for storage devices.
• RivoscoreStrategic or Co-development PartnerUsing OpenTitan Darjeeling integratable subsystem in production server SoCs. Partner in COSMIC project alongside Google. Collaborating on secure provisioning of integrated OpenTitan root of trust during SoC production.
• MicrosoftcoreStrategic or Co-development PartnerCollaborated with Microsoft on CHERIoT-Ibex verification using traditional and formal methods. CHERIoT-Ibex is Microsoft's design based on Ibex, verified by lowRISC for production-grade quality.
• ETH ZurichcoreStrategic or Co-development PartnerFounding member of OpenTitan project. Donated zero-riscy core (which became Ibex) to OpenTitan. Established lowRISC's Zurich technical office near ETH campus for academic collaboration.
• G+D (Giesecke+Devrient)coreStrategic or Co-development PartnerOpenTitan founding member and partner contributing to secure silicon development for payments and security solutions.

Scale indicators5 records

Recent moves9 records

Expansion highlights6 records

Broad incumbents

• RISC-V International: RISC-V International is the global standards body governing the RISC-V ISA that underpins both Ibex and OpenTitan; while lowRISC stewards implementations, RISC-V International sets the specification and broader ecosystem direction.
• Arm Holdings: Arm is the dominant proprietary processor IP licensor whose architecture competes head-to-head with RISC-V offerings like lowRISC's Ibex for embedded and security workloads; relevant as the incumbent alternative lowRISC positions against.
• Synopsys: Synopsys offers the DesignWare IP portfolio including security IP and processor cores, competing with lowRISC's open-source security and CPU IP and providing EDA tools that complement OpenTitan development flows.
• Imagination Technologies: Imagination Technologies licenses semiconductor IP including CPUs and security blocks, comparable to lowRISC's portfolio of CPU cores, security IP, and system IP for silicon designers.

Direct peers

• OpenHW Group: OpenHW Group is a not-for-profit global organization stewarding open-source RISC-V processor cores (such as CV32E40P/CORE-V), closely analogous to lowRISC's stewardship of OpenTitan and Ibex, and operating a similar member-funded model with commercial-grade verification goals.
• SiFive: SiFive is the leading commercial RISC-V IP vendor offering processor cores and SoC IP comparable to lowRISC's Ibex CPU; both target silicon designers needing RISC-V CPU IP, differing mainly in commercial licensing versus open-source stewardship.
• Codasip: Codasip is a commercial RISC-V processor IP company offering configurable cores and Studio tools, comparable to lowRISC's Ibex CPU business and targeting similar silicon vendor customers.
• Andes Technology: Andes Technology is a commercial RISC-V IP vendor with a broad portfolio of CPU cores comparable to lowRISC's Ibex; both serve embedded and IoT silicon customers seeking licensed RISC-V processor IP.

Others

• CHERI Alliance: CHERI Alliance is an industry coalition advancing CHERI capability-based memory safety, the same technology underlying lowRISC's CHERIoT-Ibex and CHERI-Mocha designs; relevant as the ecosystem body that complements lowRISC's implementation work.

Emerging players

• Intrinsic ID: Intrinsic ID provides hardware security IP such as PUF-based root-of-trust and key provisioning, addressing the same security primitives that OpenTitan implements in open-source form, making it a competing niche player in silicon security IP.

Market position

Strengths5 records

Weaknesses5 records

Competitive moat5 records

Key risks6 records

Key highlights7 records

Customer concentration

• GitHubgithub.com/lowRISC
• Xx.com/lowrisc

Revenue estimate

Valuation estimate

Number of profiles

Profiles8 records

Subsidiaries2 records

Funding overview

Funding rounds2 records

Investors3 records

Funding detail is available on the Subscription and Enterprise plan.Contact sales →

M&A1 record

Investments

M&A and investment is available on the Subscription and Enterprise plan.Contact sales →

Frequently asked questions about lowRISC